JPS63233555A - 樹脂封止型半導体装置 - Google Patents

樹脂封止型半導体装置

Info

Publication number
JPS63233555A
JPS63233555A JP62065715A JP6571587A JPS63233555A JP S63233555 A JPS63233555 A JP S63233555A JP 62065715 A JP62065715 A JP 62065715A JP 6571587 A JP6571587 A JP 6571587A JP S63233555 A JPS63233555 A JP S63233555A
Authority
JP
Japan
Prior art keywords
resin
heat dissipation
plate
distance
resin sealing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62065715A
Other languages
English (en)
Other versions
JP2509607B2 (ja
Inventor
Shinjiro Kojima
小島　伸次郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP6571587A priority Critical patent/JP2509607B2/ja
Publication of JPS63233555A publication Critical patent/JPS63233555A/ja
Application granted granted Critical
Publication of JP2509607B2 publication Critical patent/JP2509607B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334—Auxiliary members in encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔発明の目的〕 （産業上の利用分野） 本発明は樹脂封止型半導体装置の改良に係るもので、特
にトランジスタアレイ、　ＳＣＲアレイ等のパワーモジ
ュールや、パワートランジスタならびにパワー５ＳＯＲ
等の高出力半導体装置に適用する二重にモールドを施し
た半導体装置に関するものである。
（従来の技術） 最近の半導体装置には単一の半導体素子で構成するもの
の外に、複数の半導体素子ならびに付属回路部品を一体
としたモジュールタイプも多用されており、その放熱性
を改善するのにはリードフレームにマウントした半導体
素子と共に放熱フィンもトランスファ成形する方法が採
用されている。
このようなモジュール製品では複数の半導体素子をマウ
ントする寸法の大きいリードフレームを用いるため樹脂
封止成形工程中に湾曲して、放熱フィンとリードフレー
ムのベッド部間距離が異常に狭くなったり拡げられるこ
とがある。
このために、樹脂封止（トランスファモールド）工程を
複数回に分けて実施する方式が採用されており、リード
フレームのベッドと放熱フィン間の距離を所望の値に維
持できるので、放熱性の改善に役立つところが大きい。
第１０図によりこの二重モールド方式を説明する。
第１０図は二重モールドを施した製品の断面図、この構
造を得るには第１の樹脂封止を終えた成形品Ａを、リー
ドフレームのベッド部２０裏面と放熱フィン２１を僅か
な距離を保って金属内に配置後筒−の樹脂封止部２２と
同様なエポキシ樹脂によって封止成形を行って第二の樹
脂封止部２３を設ける。
この二重モールド方式の結果、ベッド部２０にダイボン
ディングした半導体素子２４ならびにリードフレームの
リード端子２５を架橋する金属細線２６等が埋設すると
共に、放熱フィン２１の一面はこの封止樹脂と連続して
表面を形成する。
（発明が解決しようとする問題点） このような二重モールド方式を適用した樹脂封止型半導
体装置は前述のように放熱フィンと、半導体素子をダイ
ボンディングしたリードフレームのベッド部間を僅かな
距離とし、更にこの空隙に封止樹脂層を充填するので熱
放散性に優れた特徴を持っている。これに反して、前記
空隙に封止樹脂が入りにくいためエアボイドが発生しや
すい。
また、この開封止部の境界に機械的衝撃を与えると、亀
裂やエアギャップが入り易い難点があり、これが基で放
熱特性が劣化する。
本発明は上記欠点を除去する新規な樹脂封止型半導体装
置を提供することを目的とする。
〔発明の構成〕
（問題点を解決するための手段） 二重モールド方式を適用した樹脂封止型半導体装置にお
ける板状の放熱フィンと、リードフレームのベッド部即
ち導電性金属板間を充填する第２の樹脂封止部のエアギ
ャップ等を解消するために。
この極めて狭い領域につながる板状の放熱フィンと第１
の樹脂封止部間の距離と前記導電性金属板にマウントし
た半導体素子と電気的接続を図るべく固着した金属細線
にはリード端子を連結しこれに対応する第１の樹脂封止
部と板状放熱フィン間の距離とを順次増大する手法を採
用する。
（作　用） このように本発明では極めて狭い領域に充填する溶融樹
脂通路を順次縮小するように配慮しているので、入り易
く従ってエアボイドの発生を防止して、樹脂封止型半導
体装置に必要な絶縁性ならびに熱放散性を確保したもの
である。
（実施例） 第１図乃至第９図に本発明の実施例を詳述するが、従来
の技術欄と重複する記載が都合上一部にあるが、新番号
を付して説明する。
この実施例は半導体素子６ケで構成する回路（第５図）
をもつ樹脂封止型半導体装置であり、この各半導体素子
をマウントするリードフレームも当然複雑な構造が必要
となるが、その上面図を第２図に示す。
半導体素子２・・・はベッド部即ち導電性金属板１・・
・にマウントされているが、そのパターンは複雑であり
かつ密度が高いことが良く判る。−＝一方このリードフ
レームは第１図等に示すように導電性金属板１・・・と
内部リード端子部３ならびに後述するーように金属細線
をボンディングする外部リード端子部４の３部分の高さ
を互に異らせるように折曲げてこの導電性金属板１・・
・を最低の位置にする。
半導体素子２・・・に設けるパッド２′と外部リード端
子４間には通常のボンディング法によって金属細線５を
架橋して電気的接続を図り、これをエンキャップ剤６に
よって被覆機公知のエポキシ樹脂によるトランスファモ
ールド工程を施して第１の樹脂封止部７を設ける。この
結果半導体素子２゜内部外部リード端子３，４は、金属
細線５とエンキャップ剤６は埋設されるものの、導電性
金属板１・・・の裏面はこの第１の樹脂封止部７表面に
露出する。
更に露出した導電性金属板１に対して僅かの距離を保っ
て板状の放熱フィン８を樹脂モールド用金型内に設けて
第２の樹脂封止部９を形成する。
この場合、板状の放熱フィン９と導電性金属板１間の距
離Ｃユ〈内部リード３に対応する第１の樹脂封止部７と
板状の放熱フィン９間の距離Ｃ２＜外部リード４に対応
する第１の樹脂封止部７と板状の放熱フィン９間の距離
Ｃ□として溶融樹脂が流れ易いように配慮している。Ｃ
２に示す距離を維持するには第１図に示すように板状の
放熱フィン９の所定位置即ち内部リード端子３に対向す
る位置にプレス加工で凹部１０を設けるか、第９図に示
すように第１の樹脂封止部８の厚さを小さくしても良い
。尚このトランスファモールド工程におけるゲート位置
はＣ３方向に設けて前述のように溶融樹脂の流れを改善
して最も狭いＣユの通過を良好にする。
更にこの溶融樹脂の流れに配慮した例が第３〜４図、第
６〜９図であり、結果的には第２の樹脂封止部９が第１
の樹脂封止部７を締め付けて板状の放熱フィン９と導電
性金属板１間のエアーギャップを防止している。
この第４図は第２の樹脂封止部９．形成を終えＣｕｔ工
程を終えた樹脂封止型半導体装置の上面図であり第１及
び第２の樹脂封止部７，９が連続して表面を形成してい
るが、この第１の樹脂封止部７の外側に７ａ〜７ｄの段
部を形成している。第３図イは、第１の樹脂封止部７を
形成してから不要部分を除去した成形品の平面図であり
、これをＡ−Ａ線に沿って切断した図が第３図口である
。
この段部は、第２の樹脂封止部９との密着を良（するた
めに半導体素子の外側言い換えると導電性金属板１・・
・の中間位置に形成し、この成形に当っては段部に相当
する上型キャビティの成形型を使用し、かつこの導電性
金属板１の裏面が第１の樹脂封止部７の表面を下型キャ
ビティの表面に密着配置してトランスファモールド工程
を実施して得られる。
第６図〜第８図は第４図に示したＢ−Ｂ、Ｃ−Ｃ，Ｄ−
Ｄの各線に沿って切断した製品の断面図であり、第１の
樹脂封止部７の段部７ａ〜７ｄにエポキシ樹脂で構成す
る第２の樹脂封止部９ａ〜９ｄが充填され、第７図に示
す段部テーパ７ｅは第２の樹脂封止部９に対してＵｎｄ
ｅｒ　Ｃｕｔの逆テーパであって好ましくは５°より好
ましくは１０”以上に設置する。
この段部は半導体素子２の外側をほぼ囲んで設けられて
いるので、前記Ｃ１の距離を持つ導電性金属板ｌと板状
の放熱フィン８間に充填する第２の樹脂封止部９の密着
性が改善されて、第１の樹脂封止部を締め付ける効果を
発揮する。
尚第４図に示すように第１の樹脂封止部７が露出する面
積は第１の樹脂封止部７の投影面積の約５０％が好まし
く、密着力を強めるために少なくすると　Ｃ工距離を所
望の寸法に収めることができず、ボイドが抜けずに絶縁
不良となる。これは第２の樹脂封止部９成形時にＣ１距
離をもった隙間が後から充填されてここでの樹脂圧が小
さくなってかつボイドを差込み易い、ためである。
〔発明の効果〕
この二重モールド方式を採用した樹脂封止型半導体装置
では板状放熱フィンと第１の樹脂封止部間に第２の樹脂
封止用樹脂が充填され易くて、エアーボイドが発生し難
い。従って半導体装置の耐絶縁性が安定して高耐圧素子
が得られる効果があり、しかもリード端子の自由度も従
来より増す。
又厚さ２■の板状放熱フィンを使用して外形寸法が７７
（幅）Ｘ２７（高）×７（厚）ｍである第４図の樹脂封
止型半導体装置を試料としてＣ１を０．３４ｍｍとする
と、ピーク値としてＡｃ　７ｋＶを１分でクリアでき、
０．３ＤｍではＡｃ４．９ｋＶＸ　１分をクリアした。
【図面の簡単な説明】
第１図は本発明の係る半導体装置の要部を示す断面図、
第２しリードフレームの平面図、第３図イは第１の樹脂
封止後の状態を示す主面図、第３図口は第３図イをＡ−
Ａ線に沿って切断した断面図、第４図は本発明に係る半
導体装置の上面図、図 第５図はこの半導体装置の回路図、第臥〜第８図は第４
図のＢ−Ｂ、　Ｃ−Ｃ１Ｄ−Ｄ線に沿って切断した断面
図、第９図は本発明に係る半導体の要部を示す断面図、
第１０図は従来装置の断面図である。

Claims (1)

  1. 【特許請求の範囲】 　導電性金属板表面にマウントする半導体素子と、この
    周囲に配置する遊端をもつリード端子と、このリード端
    子と前記半導体素子間を架橋する金属細線と、この金属
    細線及び前記半導体素子を埋設し前記導電性金属板の裏
    面を露出して封止成形する第１の樹脂封止部と、前記導
    電性金属板の裏面と僅かな距離を、維持して対向配置す
    る板状の放熱フィンと、この僅かな距離をうめ前記板状
    の放熱フィンの裏面を露出し前記第１の樹脂封止部を含
    めて封止成形する第２の樹脂封止部とをもつ樹脂封止型
    半導体装置において、 前記板状の放熱フィンと導電性金属板裏面間の距離を最
    小とし、前記放熱フィンと第１の樹脂封止部間の距離、
    前記金属細線を接線する前記リード端子に対応する第１
    の樹脂封止部と前記板状の放熱フィン間の距離を順次増
    大することを特徴とする樹脂封止型半導体装置。
JP6571587A 1987-03-23 1987-03-23 樹脂封止型半導体装置 Expired - Lifetime JP2509607B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6571587A JP2509607B2 (ja) 1987-03-23 1987-03-23 樹脂封止型半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6571587A JP2509607B2 (ja) 1987-03-23 1987-03-23 樹脂封止型半導体装置

Publications (2)

Publication Number Publication Date
JPS63233555A true JPS63233555A (ja) 1988-09-29
JP2509607B2 JP2509607B2 (ja) 1996-06-26

Family

ID=13294993

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6571587A Expired - Lifetime JP2509607B2 (ja) 1987-03-23 1987-03-23 樹脂封止型半導体装置

Country Status (1)

Country Link
JP (1) JP2509607B2 (ja)

Cited By (62)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5328870A (en) * 1992-01-17 1994-07-12 Amkor Electronics, Inc. Method for forming plastic molded package with heat sink for integrated circuit devices
US5701034A (en) * 1994-05-03 1997-12-23 Amkor Electronics, Inc. Packaged semiconductor die including heat sink with locking feature
US6143981A (en) * 1998-06-24 2000-11-07 Amkor Technology, Inc. Plastic integrated circuit package and method and leadframe for making the package
JP2001094019A (ja) * 1999-09-24 2001-04-06 Sharp Corp 半導体装置およびその製造方法
US6281568B1 (en) 1998-10-21 2001-08-28 Amkor Technology, Inc. Plastic integrated circuit device package and leadframe having partially undercut leads and die pad
US6448633B1 (en) 1998-11-20 2002-09-10 Amkor Technology, Inc. Semiconductor package and method of making using leadframe having lead locks to secure leads to encapsulant
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