JPS63229376A - Level detection circuit - Google Patents

Abstract

PURPOSE:To set an input voltage to a reference voltage, by detecting positive and negative components of AC voltage overlapping the input voltage to adjust the input voltage so that both the components equal. CONSTITUTION:A voltage V is applied to one end of a comparator 1 at an input terminal 7 while a voltage V0 as reference voltage 2 to be other end thereof. An output of the comparator 1 is applied to a D terminal of a flip-flop FF3 while an output pulse of a pulse generator 4 to a T terminal. The output pulse is also applied to a T terminal of counters 5a and 5b. A '1' terminal output of the FF3 enters a CE terminal of the counter 5a while a '0' terminal output does a CE terminal of the counter 5b. A decision device 6 judges the size of outputs of the counters 5a and 5b to vary an input voltage V so that they equal. Thus, the input voltage V can be set accurately to a reference voltage V0.

Description

Detailed Description of the Invention (a) Technical Field of the Invention The present invention reduces the influence of a waveform superimposed on the input voltage when adjusting the input voltage to be equal to a reference voltage. This is about the level detection circuit.

(BL Prior Art and Problems! ?Jl) A level detection circuit according to the prior art is shown in Fig. 2.

11 and 12 in Fig. 2 are reference voltages, 13 and 14 are comparators,
15 is a gate, 16 is an input terminal, and 17 is an output terminal.

FIG. 2 shows a circuit that determines whether the input voltage (2) applied to the input terminal 16 is between the reference voltage 11 and the reference voltage 12.

If the voltage of the reference voltage 11 is VO-Δv1 and the voltage of the reference voltage 12 is Vo+ΔV, when (Vo+Δv)>V> (Vo-ΔV), an output is output from the output terminal 17 and the input voltage V becomes the reference voltage Vo. This means that it is set within the range of .

In some cases, the input voltage V is set to a voltage of about Vo=2 volts and Δv=0.5 mV in FIG. 2.

For example, when an operational amplifier is used as the input of an optical gravity measuring instrument, the offset voltage of the operational amplifier when there is no optical input is set.

In the circuit shown in Fig. 2, when the ripple voltage of the AC power supply is superimposed on the power supply, the input voltage V is accurately referenced and the voltage 11
There is a problem that the voltage cannot be set between the reference voltage 12 and the reference voltage 12.

(c) Purpose of the Invention The present invention provides a circuit that can count the positive and negative components of the alternating current component superimposed on the input voltage V, so that the positive and negative components are equal. An object of the present invention is to provide a level detection circuit that can set an input voltage V to a reference voltage without being affected by alternating current components superimposed on the input voltage.

(d) Examples of the invention Next, a block diagram of an embodiment according to the present invention is shown in FIG.

In Fig. 1, 1 is a comparator, 2 is a reference voltage, 3 is a FF (hereinafter referred to as FF), 4 is a pulse generator, 5a
and 5b are counters, 6 is a determiner, 7 is an input terminal, and 8 is an output terminal.

The voltage ■ of the input terminal 7 is applied to one end of the comparator 1, and the voltage Vo of the reference voltage 2 is applied to the other end of the comparator 1.

The output of comparator 1 is added to the D terminal of FF3, and the T
The output pulse of the pulse generator 4 is applied to the terminal.

The output pulse of the pulse generator 4 is applied to the T terminal of the counter 5a and the T terminal of the counter 5b as well as to the Ti terminal of the FF 3.

The "1" terminal output of FF3 enters the CE terminal of the counter 5a, and the "0" terminal output of FF3 enters the CE terminal of the counter 5b.

The determiner 6 determines the magnitude of the output of the counter 5a and the output of the counter 5b.

Next, the operation of FIG. 1 will be explained with reference to the waveform diagram of FIG. 3.

FIG. 3(A) is an explanatory diagram of the relationship between the input voltage V1 reference voltage vO and the AC voltage E.

The period of AC voltage E is assumed to be 20 m5.

The AC voltage E is superimposed on the input voltage V, but the reference voltage V
For o, the time between time TI and time T2 is positive, time T2
It is negative between and time T3.

FIG. 3(a) is a diagram of the output pulse waveform of the pulse generator 4, and the pulse repetition period is the AC voltage E in FIG. 3(a).
Use one that is sufficiently short compared to the period of .

Figure 3 (1) is an output waveform diagram of comparator 1;
1) is the "1" terminal output of FF3. Also, Figure 3 (
E) is the count value of the counter 5a.

The rising edge of FIG. 3(I) is synchronized with the q rising of the clock in FIG. 3(a), and the rising edge of FIG. 3(1) is synchronized with the falling edge of the clock in FIG. 3(a).

FIG. 3 (force) shows the "0" terminal output of the FF3, and FIG. 3 (g) shows the count value of the counter 5b.

Corresponding to the AC voltage E in FIG. 3(a), 20 pulses are output in FIG. 3(b).

The count value of the counter 5a in FIG. 3(E) is 13, and the count value of the counter 5b in FIG. 3(G) is 7. From this, it can be seen that the AC voltage E is unbalanced with respect to the reference voltage VO, and the input voltage V is changed until the count value of the counter 5a and the count value of the counter 5b become equal.

When the count value of the counter 5a and the count value of the counter 5b become equal, it means that the input voltage V is set to the reference voltage VO.

According to the present invention, a comparator that compares an input voltage with a reference voltage, an FF that receives the output of the comparator as an input, a first counter that counts the "1" output of the FF, and a "1" output of the FF. 0'' output, and detects the positive component and negative component of the AC voltage superimposed on the input voltage,
Since the input voltage is adjusted so that the positive and negative components are equal, the input terminal can be accurately set to the reference voltage.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment according to the present invention, FIG. 2 is a block diagram of a conventional technique, and FIG. 3 is a waveform diagram of FIG. 1. 1...Comparator, 2...Reference voltage, 3.
...F'J Sopfronop (FF), 4...
...Pulse generator, 5a... Counter, 5b.
...Counter, 6...Judgment device, 7...
...Input terminal, 8...Output terminal, 11...
...Reference voltage, 12...Reference voltage, 13...
...Comparator, 14...Comparator, 15...
...Gate, 16...Input terminal, 17...
...Output terminal. Agent Patent Attorney Kin Tsukasa Omata 1st Diagram Judgment Diagram 2 is] occlusion

Claims (1)

[Claims] 1. A comparator that receives an input voltage and a reference voltage as inputs, a flip-flop that uses the output of the comparator as a D terminal input, and a first comparator that uses the "1" terminal output of the flip-flop as an input. a second counter that receives the "0" terminal output of the flip-flop; and a second counter that receives the clock pulse from the T terminal of the flip-flop;
A level detection circuit comprising: a pulse generator that supplies the T terminal of the counter and the T terminal of the second counter; and a determiner that determines the magnitude of the first counter output and the second counter output. .