SU1741264A1 - Integrating current-to-code converter - Google Patents

Abstract

The invention relates to a pulse technique and can be used in electronic systems for processing analog information as a DC converter into time difference and a digital code. The purpose of the invention is to improve accuracy. The converter contains an input current source 1, a capacitor integrator 2, a bridge switch of four analog switches 3-6, a reference current source 7, a threshold voltage source 8, a comparator 9 with differential inputs, a clock generator 10, a trigger 11, and a reversible counter 12. The proposed device is a bipolar converter of direct current to the difference of time intervals with the formation of a sweeping sawtooth voltage at the terminals of the capacitor and obtaining a digital code at the outputs of the reverse vnogo counter. The comparison unit is made on one comparator with differential inputs connected not to the integrator leads, but to the diagonal leads of the bridge switch for connecting the reference current source in series with the threshold voltage source. The comparator output is connected to the combined I and K inputs of the control trigger, the C input of which is connected to the output of the clock generator. 2 Il. (/ WITH

Description

The invention relates to a pulse technique and can be used in electronic systems for processing analog information as a DC converter - time difference - code.

The purpose of the invention is to improve the accuracy of the converter.

1 shows a functional diagram of the converter; in fig. 2 - timing charts of the device.

The device contains an input current source 1, an integrator-capacitor 2, a bridge switch of four analog switches 3-6, a reference current source 7, a threshold voltage source 8, a comparator 9 with differential inputs, a clock generator 10, a trigger 11c K- and C- inputs and reversible counter 12.

The combination of elements 3-7 forms the shaper of the bipolar reference current, the comparison unit is implemented on elements 8.9, and the synchronization node on elements 10.11.

FIG. 2 shows the timing diagram of the device for putting

Ј

Yu O

N

telny input current 1 in + 1et / 3, where Uc is denoted is the sweep sawtooth voltage at the leads of the integrator 2; UBX.KR is the voltage at the non-inverting input of the comparator 9 relative to the common point of the elements 7,8; Uvyh.kp - pulses at the output of the comparator 9; tV - pulses at the output of the clock generator 10; UTp - pulses at the direct output of the trigger 11; These pulses are at the output of a bipolar reference current driver.

The conversion of the bipolar input current of source 1 to the time difference at the output of trigger 11 and the digital code N (t) at the outputs of the reversible counter 12 is based on the principle of comparing the integrals of the input IBX and pulses ± 1 Et of the reference current. Elements 1-11 of the proposed device form the following control system with a closed feedback loop, in which self-oscillations occur at a frequency multiple of the clock frequency of the generator 10. The charge of the integrator 2 occurs under the action of a current determined by the algebraic sum of the input current IBX of the source 1 and ± This forms a bipolar reference current. The frequency of auto-oscillations of the sawtooth voltage at the terminals of the capacitor 2 is maximum in the middle of the range of input currents, i.e. in the region of small input currents, and minimal at the edges of the input current range. In the limit at (1Вх) these auto-oscillations are absent. At zero input current, a sawtooth voltage of a symmetrical form with equal times of charge and discharge of the capacitor by the bipolar currents of the driver arises on the capacitor. The difference in time intervals at the output of the trigger 11 is equal to zero. When the input current appears, the symmetry of the sawtooth voltage of the capacitor in one direction or another depends on the sign of the input current. The difference in time intervals at the output of the trigger is determined by the ratio

AT Ti-T2 (Ti + T2) in / 1et.

In the proposed device, the switches 3–6 of the bridge switch, in addition to the function of the bipolar reference current driver, perform the function of the synchronous bipolar voltage of the integrator. The output voltage of the synchronous rectifier (Fig. 26) is applied to the non-inverting input of the comparator 9 relative to the common point of the elements 7.8. When the voltage on the non-inverting input of the comparator UBX kp of the voltage Unop of the source 8 is exceeded, the pulses 1 appear at the output of the comparator 9 (Fig. 2b), which allow trigger 11 to switch on the trailing edge of the clock pulse at its C input. Thus, elements 8 and 9 perform the function of a threshold device, which is common both in the formation of the positive part of the ramp-like integrator sawtooth and in the formation of the negative part of the integrator's bipolar voltage. The proposed execution features of the comparator unit allow to form a sweep sawtooth voltage of the integrator, 5 with symmetrical near zero, i.e. having a constant component of the voltage close to zero. This property is necessary to eliminate the effect of the impedance conversion

0 leak of an integrator and elements connected in parallel to it.

In the proposed device, the sweep of the sawtooth voltage of the integrator is determined by the ratio

5Uc (ipor-ikl),

where 11kl is the voltage drop on the two included keys, 3.6 or 4.5.

When performing keys 3-6 bridge switch on the K-MOS keys, for example

0 IC 590 KN5, the last expression can be written as

Uc max 2P (Unop-2 RCT biji

where RO is the resistance of one public key.

5 To obtain an integrator sawtooth voltage symmetric about zero, the Source Support 8 value must be selected from the Unop 2 Ro lsT condition.

Claims (1)

0 claims Integrating current converter into a code containing an input current source, a comparison unit, a bipolar reference current driver made on a bridge switch and a reference current source, a clock generator, a trigger, a reversible counter and an integrator on a capacitor, the first and second terminals of which are connected to the same the outputs of the input current source, the first output is to the first output of the first diagonal of the bridge switch, the second diagonal of which is connected to the outputs of the reference current source, direct output trig Hera is connected 5 to the control input of the reversible counter and the first control input of the bridge switch, the clock input of the reversible counter is connected to the output of the clock generator, and the outputs are output bus characterized in that that, in order to improve the accuracy of the converter, the comparison unit in it is made on the source of the threshold voltage and comparator, the first input of which is directly, and the second through the source of the threshold voltage are connected to the corresponding outputs of the reference current source, output 1-18x the comparator is connected to the trigger inputs, the C input of which is connected to the clock generator output, and the inverse output is connected to the second control input of the bridge switch, the second output of the first diagonal of which is connected to the second capacitor output.