SU1583857A1

SU1583857A1 - Device for checking root-mean-square value of variable voltage

Info

Publication number: SU1583857A1
Application number: SU884388740A
Authority: SU
Inventors: Ольга Михайловна Доронина; Владимир Михайлович Ванько; Геннадий Николаевич Лавров
Original assignee: Львовский политехнический институт им.Ленинского комсомола
Priority date: 1988-03-09
Filing date: 1988-03-09
Publication date: 1990-08-07

Abstract

Изобретение относитс к электроизмерительной технике и может быть использовано в системах порогового контрол среднеквадратического значени напр жени в сет х переменного тока. Устройство позвол ет повысить точность определени оценки среднеквадратического значени контролируемого напр жени за счет исключени ее зависимости от изменени периода напр жени и расширить функциональные возможности путем определени времени выхода напр жени за допусковую зону. Дл этого в устройство ввод тс аналого-цифровой преобразователь 3, переключатели 4 и 5 кодов, умножитель 6, накапливающий сумматор 7, генератор 8 опорной частоты, счетчик 9 импульсов, блок 12 посто нной пам ти, блоки 13 и 14 сравнени , триггеры 15 и 16, инвертор 18 и импульсный элемент ИЛИ 19, осуществл ющие определение оценки среднеквадратического значени контролируемого напр жени по каждому полупериоду его следовани и отслеживание ее выхода за допусковую зону, определение продолжительности которого осуществл етс благодар введению счетчика 10, регистра 11 и триггера 17. Кроме того, устройство содержит датчик 1 напр жени , нуль-орган 2, элемент ИЛИ 20. 2 ил.The invention relates to electrical measuring technology and can be used in threshold control systems for the rms value of voltage in AC networks. The device makes it possible to increase the accuracy of determining the estimate of the rms value of the monitored voltage by eliminating its dependence on the change in the voltage period and to extend the functionality by determining the time of voltage output beyond the tolerance zone. For this, an analog-to-digital converter 3, switches 4 and 5 codes, multiplier 6, accumulating adder 7, reference frequency generator 8, pulse counter 9, fixed memory unit 12, comparison blocks 13 and 14, triggers 15 and 16, the inverter 18 and the pulse element OR 19, determining the estimate of the rms value of the monitored voltage for each half-period of its follow-up and tracking its output beyond the tolerance zone, the duration of which is determined by the introduction of a counter 10, the register 11 and latch 17. Additionally, the apparatus comprises a sensor 1 voltage zero-body 2, an OR gate 20. The 2-yl.

Description

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Claims

A device for controlling the rms value of an alternating voltage ed, comprising a voltage sensor, a null organ and an OR element, with -. than the input of the sensor is connected to the input voltage bus, and the output is connected to the input of the zero-organ, which differs from the fact that, in order to increase the accuracy and expand the functionality by determining the time that the voltage leaves the tolerance zone, analog inputs are introduced into it -digital jq converter, first and second code switches, multiplier. accumulating adder, reference frequency generator, first and second pulse counters, register, read-only memory block, first and second comparison blocks, first, second to third triggers, invert p and a pulse element OR, and the output of the voltage sensor is connected to the analog input 39 of an analog-to-digital converter, the clock input of which is connected to the output of the reference frequency generator, with the inputs of the first and second counters ι KOV pulses, the input of the installation in 1 of the first trigger, the synchronization input zero-organ and through the inverter - with the first input of the pulse _ element OR, the recording input of the accumulating adder and the setting inputs to O ”and 1, respectively, of the second and third triggers, the first 'inputs of the first and second switch Lei codes are connected to the outputs of the analog-to-digital converter, the second inputs to the outputs of the accumulating adder and the read-only memory, respectively, and the outputs, respectively, to the first and second inputs of the multiplier, the recording input of which is connected to the output of the pulse element OR, and the outputs to the inputs of the accumulating adder and the first inputs of the first and second comparison units, the second inputs of which are connected respectively to the buses of the maximum and minimum estimates of permissible voltage levels, and the outputs, respectively, to the first and the second inputs of the OR element, the output of which is connected to the D-inputs of the second and third triggers, the output of the zero-organ is connected to the input of the first trigger in O, the output of which is connected to the control inputs of the first and second code switches, the second input of the pulse OR element, the inputs setting in O the first pulse counter and the accumulating adder ', as well as the synchronization inputs of the second and third triggers, the outputs of the bits of the first pulse counter are connected to the address inputs. of a permanent memory unit, the outputs of the discharges of the second pulse counter are connected to the inputs of the register, the outputs of which are the second outputs of the device, and the installation input in O ”is connected to the installation input in” 0 of the second pulse counter and the output of the third trigger, and the recording input is to the output of the second trigger and is the first output of the device.