JPH04350707A - Automatic correcting circuit for lsi input clock duty - Google Patents

Abstract

PURPOSE:To automatically correct the duty of a clock varied by a duty varying party and a duty check part with respect to a duty automatic correcting circuit in an LSI clock input part. CONSTITUTION:A duty varying part 2 consisting of a capacitor 21, a variable resistance 22, a buffer 23, a resistance 24, and a stabilized power source 25 and a duty check part consisting of a threshold measuring part, a duty setting part 32, and a comparator 33 are provided, and a clock input signal is inputted to the duty varying part 2, and the output of this part 2 is detected by the duty check part 3, and check information from the duty check part 3 is returned to the duty varying part 2, and the variable resistance 22 of the duty varying part 2 is adjusted to vary the threshold voltage, and the varied clock signal is supplied to an LSI.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic duty correction circuit in an LSI clock input section. In an LSI circuit, a clock is input from the outside through a clock input terminal and used for processing internal circuits. Generally, the clock signal supplied to the LSI circuit is a high-speed clock from a clock pulse oscillator, for example, a clock with a frequency of 150 MHz, and internal clock signals are alternately "H" and "L" with a duty of 50%. supplying the circuit. The duty of this clock used is preferably 50% in terms of the circuit. However, the duty of the input clock may vary due to the influence of the environment and the like. Therefore, the duty of the input clock of the LSI must be constantly corrected in order to properly operate the internal circuit.

0002

2. Description of the Related Art The duty of a conventional LSI input clock is corrected in advance during a package test. The duty was corrected to 50% by manually adjusting the DC voltage while comparing the clock signal from the clock pulse oscillator with the threshold voltage using a tester. Therefore, once the clock pulse is fixed, many LSIs use the clock signal in common, so there is no need to correct the input clock for each LSI. Therefore, even if there is a change in the clock duty due to changes in the environment or the like during the process, some of the functions of the LSI may not work because the clock is input as is.

0003

[Problems to be Solved by the Invention] Conventional LSI input clocks manually correct the duty during package testing, so once it is fixed, the LSI input clock may change due to fluctuations in the input clock duty caused by various environmental changes.
In some cases, the function of I was affected.

An object of the present invention is to create conditions for fully satisfying the functions of an LSI by automatically and constantly monitoring and correcting the duty, instead of fixing the clock signal as in the past. .

[0005]

[Means for Solving the Problems] A diagram of the principle configuration of the present invention is shown in FIG. In the figure, 1 is a duty correction circuit, 2 is a variable duty section, and 3 is a duty inspection section. , the output of the duty variable section 2 is detected by the duty inspection section 3, the inspection information from the duty inspection section 3 is returned to the duty variable section 2, and the variable clock signal is supplied to the LSI. .

The variable duty section 2 includes a capacitor 21, a variable resistor 22, a buffer 23, a resistor 24, and a stabilized power supply 25.
The duty test section 3 is composed of a threshold measurement section 31, a duty setting section 32, and a comparator 33.

[0007]

[Function]■ In the variable duty section 2, the ECL level is taken as an example for both the input and output, and the capacitor 21 removes the DC component of the sine wave input clock signal, and the variable resistor 22 applies a new bias to set the threshold. value). (2) In the variable resistor 22, the threshold is adjusted by changing it to + or - in a certain width based on the information obtained by the duty inspection section 3. ■ In the duty inspection section 3, the threshold measurement section 31 measures the threshold of the sine wave clock signal currently being output, and the comparator (op-amp) 33 compares the threshold to see if it matches the set value set in the duty setting section 32. and judge. (2) The result is sent to the duty variable section 2, and if it is the set value, the duty is not changed, and if it is not the set value, the duty is adjusted and the buffer 23 outputs the adjusted clock signal to the LSI.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 2 shows a block diagram of an embodiment of a duty correction circuit according to the present invention. FIG. 2(a) is a block diagram of the duty variable section, and FIG. 2(b) is a block diagram of the duty checking section. In FIG. 2(a), 21 is a capacitor C1, 22 is a variable resistor R1, and 23 is a buffer BU.
FF, 24 is resistor R2, 25 is stabilized power supply (-5.2V
) is shown. In FIG. 2(b), 31 is a threshold measurement section, 32 is a duty setting section, 34 is a + side comparator, and 35 is a - side comparator.

In the duty variable section 2 of FIG. 2(a), the input clock signal is composed of a sinusoidal AC signal superimposed on a DC voltage, and for example, the DC voltage is set to a reference level of -1.3V.
In the case of , clock signals with a duty of 50% and 50% are sent out, and when the DC voltage is -1.2V, a clock signal with a duty of 40% and 6 is sent out.
It is assumed that a clock signal with a duty of 0% is sent. When this input clock signal is input to point A, the DC component is cut off by capacitor C1, and only a sinusoidal AC signal is sent to connection point D between variable resistor R1 and stabilized power source -5.2V. Point D is set in advance to a threshold of -1.3V by variable resistor R1, and the sine wave AC signal superimposed on this DC voltage is output from the buffer 23 to point C and sent to the LSI as a clock signal. Sent out. However, if the voltage at connection point D is on the + side or - side of the threshold value -1.3V, the output signal from point C is inspected by duty inspection section 3, and the variable resistor R1 is inspected based on the duty inspection information from point B. The threshold DC voltage at point D is variably adjusted to the + side or - side to be superimposed. Therefore, even if the DC voltage of the input clock signal fluctuates and the duty varies, by adjusting the threshold DC voltage at point D, the duty of the output clock signal from point C can be adjusted to 50%.

In the duty checking section 3 shown in FIG. 2(b), the threshold measuring section 31 is composed of an AC-DC converter circuit, inputs a sine wave clock signal on which DC is superimposed, and calculates the DC component of the average effective value indication. Output and send out the threshold value. Therefore, in the above example, if the input clock signal has a duty of 50% and 50%, it will send out -1.3V, and if it has a duty of 40% and 60%, it will send -1.2V.
Send V. The voltage comparator is composed of two comparators, a + side comparator 34 and a - side comparator 35, and the output from the threshold measuring section 31 is inserted into the + side input terminal of the + side comparator 34 through a resistor R3. It is also inserted through the resistor R4 to the - side input terminal of the - side comparator 35. Further, the threshold voltage from the duty setting section 32 is +
The negative side input terminal of the negative side comparator 34 is set to the positive side input terminal of the negative side comparator 35. In the + side comparator 34, the input voltage Vin from the threshold measuring section 31 is the threshold value VR.
When it is larger than EF, the comparator 34 outputs + to Vout.
The voltage is output, and the variable resistor R1 of the variable duty section 2 is adjusted to lower the threshold at point D. Conversely, when the input voltage Vin from the threshold measuring section 31 is smaller than the threshold value VREF in the negative side comparator 35, a negative voltage is output from the comparator 35 to Vout, and the variable resistor R1 of the variable duty section 2 is adjusted. Adjust to raise the threshold of point D.

[0011]

[Effects of the Invention] According to the present invention, even if the duty of the LSI input clock signal fluctuates due to the influence of the environment, the duty automatic correction circuit automatically corrects it, thereby preventing the LSI circuit operation from becoming unstable due to duty fluctuation. It can be prevented. Note that the present invention can stabilize the duty not only with an LSI input clock but also with any sine wave. Further, in the duty inspection section, it is also possible to make the duty variable within a certain range by setting the duty threshold value.

[Brief explanation of drawings]

[Figure 1] Principle configuration diagram of the present invention

[Figure 2] Block configuration diagram of the embodiment

[Explanation of symbols]

1 Duty correction circuit 2　Duty variable section 3 Duty inspection section 21 Capacitor 22 Variable resistance 23 Buffer 24 Resistance 25 Stabilized power supply 31 Threshold measurement section 32 Duty setting section 33, 34, 35 Comparator

Claims (1)

[Claims] [Claim 1] In the automatic duty correction circuit (1) in the LSI clock input section, a capacitor (21)
and variable resistor (22), buffer (23) and resistor (24)
and a stabilized power supply (25).
), a duty checking section (3) consisting of a threshold measuring section (31), a duty setting section (32), and a comparator (33), which inputs a clock input signal to the duty variable section (2) and determines the duty. The output of the variable section (2) is detected by the duty inspection section (3), and the output of the variable section (2) is detected by the duty inspection section (3).
The inspection information from 3) is returned to the variable duty section (2), the variable resistor (22) of the variable duty section (2) is adjusted to vary the threshold voltage, and the varied clock signal is sent to the LSI. An automatic LSI input clock duty correction circuit.