JPH02248870A - Baseline correction circuit for pulse signal - Google Patents

Abstract

PURPOSE:To turn a baseline down to zero with the prevention of a low frequency change in an input pulse signal with a simple construction by rectifying a negative signal part of a processing output signal from an HPF in version to add up a rectification averaging output signal at the negative signal part obtained to the processing output signal. CONSTITUTION:An inversion rectifying circuit 2 outputs a first inversion rectification signal eda with a negative signal part rectified at a processing output signal eh from an HPF 1 and a second inversion output signal eda (=-eda) with a positive signal part rectified at the signal eh to first and second smoothing circuit sections 3a and 3b of a smoothing circuit 3. A 1/2 rectification averaging output signal eaa and a -1/2 rectification averaging output signal eab (=-eaa) are inputted into an addition circuit 3c comprising an inversion amplification A4 from the circuits 3a and 3b to add up and a rectification averaging signal e0 of positive and negative signal parts at the averaging signal, namely, the signal eh is outputted. Thus, a baseline coincides fully with a zero base while there is no distortion in a pulse waveform.

Description

[Detailed Description of the Invention] (Industrial Application Field) The present invention can be used very effectively in a device that needs to measure the height of each pulse in a measured pulse signal, such as a radiation measuring device. , relates to a pulse signal baseline correction circuit having a completely new configuration.

[Conventional technology]

As shown in FIG. 8, the pulse signal e measured by various detectors (for example, a photodetector) and input to the signal processing circuit generally has a baseline that is lifted from the zero base and It fluctuates at a relatively low frequency (the pattern of the fluctuation is exaggerated in the drawing).

Therefore, as a means for removing such low frequency fluctuations in the baseline, conventionally, as shown in FIG. 8, the input pulse signal e! is input to the high-pass filter 1. The process of passing is performed.

[Problem to be solved by the invention]

However, the above conventional means has the following problems.

That is, when the frequency of the input pulse signal ei itself is relatively low, as shown in FIG. It is possible to obtain a final output signal e0 that is well matched, and the subsequent pulse height measurement can be performed with high precision. However, if the frequency of the input pulse signal el itself is relatively high, as shown in Fig. 9. As shown in Figure 3, the low frequency fluctuations in the baseline can be removed, but the final output signal e. A disadvantage arises in that the baseline of the pulse is lower than the zero base, and therefore the pulse height is measured to be lower than it actually is. In addition, if the time constant of high-pass filter 1 is adjusted to be shorter in order to solve such a problem,
As shown in FIG. 2, distortion occurs in the pulse waveform of the final output signal e0, and accurate pulse height measurement cannot be performed.

The present invention has been made in view of the above-mentioned conventional situation, and its purpose is to have a relatively simple and inexpensive circuit configuration, even when the frequency of the human pulse signal is high. Baseline correction for pulse signals that can reliably remove low-frequency fluctuations in the baseline without causing disadvantages such as distortion of the pulse waveform, and can obtain a final output signal whose baseline closely matches the zero base. The goal is to provide circuits.

[Means to solve the problem]

In order to achieve such an object, the pulse signal baseline correction circuit according to the present invention, as shown in the basic block circuit diagram of FIG. fluctuating pulse signal etc.
a high-pass filter 1 to which is input, an inverting rectifier circuit 2 that rectifies the negative signal portion of the processed output signal e1 of the high-pass filter 1, and a smoothing circuit 3 that averages the inverted rectified output signal e4 of the inverting rectifier circuit 2. , the high-pass filter 1 obtained by the smoothing circuit 3
and an adder circuit 4 which outputs a final output signal e0 obtained by adding the rectified and averaged output signal e of the negative signal portion of the processed output signal e1 from the high-pass filter 1 to the processed output signal eh from the high-pass filter 1. It is characterized by the fact that it exists.

[Effect]

The effects exhibited by the above characteristic configuration will be described in detail below.

FIG. 2 shows the processed output signal e by the high-pass filter 1 when the frequency of the human pulse signal eI is relatively high.
, the period of this processed output signal e1 is T, the total height of the non-pulse part is E (≧0), and the height below the baseline is Ea. (≧0), since there is a relationship T T , the formula T E holds true.

Furthermore, the inverting rectifier circuit 2 and the smoothing circuit 3 provide
The signal e obtained by rectifying and averaging the negative signal portion of the processed output signal e1 by the high-pass filter 1 is as follows: e,=EA River... (2).

Substituting the above 0 expression into this 0 expression, we get E.A. = (I--)EA is obtained.

Next, the rectified and averaged signal e1 of the negative signal portion of the processed output signal e from the high-pass filter 1 obtained by this equation (2) is added to the processed output signal e6 from the high-pass filter 1 by the adding circuit 4. The baseline ego of the obtained final output signal e0 is calculated for the non-pulse portion t as follows: eao=EA +e* EA −−F,, +E, − ■ The deviation of the processed output signal e (baseline) from the zero base was -EA, but in the inverting rectifier circuit 2. After correction by the smoothing circuit 3 and the addition circuit 4, the deviation of the baseline (the baseline eoo of the final output signal e0 from the addition circuit 4) from the zero base is -E, ! /E
It can be seen that it can be significantly reduced to .

In other words, to give a specific example, for example, T-1゜t-0
, 9, the deviation of the baseline before correction from the zero base - EA is 1, E, --0. IE ・・・・・・ ■In contrast, the deviation of the corrected baseline e0° from the zero base -
E, "/E is -EA" /E=-0,OL E...
■, and it becomes like a one-finger hand.

As is clear from the above description, the pulse signal baseline correction circuit according to the present invention can be configured with a relatively simple and inexpensive circuit, and can be used even when the frequency of the input pulse signal is high. reliably eliminates low-frequency fluctuations in the input pulse signal et without requiring operations such as adjusting the time constant of the high-pass filter 1 to shorten the time constant of the high-pass filter 1, which may cause disadvantages such as distortion of the pulse waveform. Moreover, it is now possible to obtain a final output signal e0 whose baseline satisfactorily matches the zero base.

〔Example〕

Hereinafter, various specific embodiments of the present invention will be described based on the drawings (FIGS. 3 to 7).

FIG. 3 shows the overall detailed circuit of the pulse signal baseline correction circuit according to the first embodiment, and the waveforms of the signals in each part of the baseline correction circuit described in the following explanation are shown in FIG. It is shown.

In FIG. 3, reference numeral 1 denotes a high-pass filter 1 for removing low frequency fluctuation components included in the baseline of the pulse signal el inputted through the input terminal I, and is composed of a capacitor 01 and a resistor R1. A processed output signal e1 from the high-pass filter 1 is branched and inputted to an inverting rectifier circuit 2 and an adder circuit 4, which will be described in detail later.

The inverting rectifier circuit 2 connects an inverting amplifier A1, peripheral input resistor R1, feedback resistor R3, and rectifiers Dr and Dx as shown in the figure, to control the negative signal portion of the processed output signal e from the high-pass filter 1. It is configured to output an inverted rectified output signal e4 obtained by rectifying the . Subsequently, the inverted rectified output signal e is input to a smoothing circuit 3 formed by connecting an inverting amplifier A2, an input resistor Ra around it, a feedback resistor R2, and a capacitor C- as shown, and is averaged. . The averaged signal ea output from the smoothing circuit 3, that is, the rectified and averaged output signal e of the negative signal portion of the processed output signal e5 from the high-pass filter 1 is the processed signal ea output from the high-pass filter 1. Together with the output signal e1, it is inputted to an adder circuit 4 consisting of an inverting amplifier A2, peripheral input resistors Rh, Rt, Rt, and a feedback resistor R9 connected as shown in the figure, and in this adder circuit 4, the two signals ea+eh are added together. (This is called addition because it subtracts the negative component e), and the final output signal e0, in which low frequency fluctuations in the input pulse signal ei are removed and whose baseline almost coincides with the zero base, is output. It is output via terminal 0.

By the way, in the correction circuit of the first embodiment, the fourth
As shown in a slightly exaggerated manner in the figure, the smoothing circuit 3
Since a slight ripple remains in the rectified and averaged output signal e output from the high-pass filter l, the final output signal e0 obtained by adding this rectified and averaged output signal e to the processed output signal e1 from the high-pass filter l also Due to the influence of the ripple, the baseline does not always completely match the zero base, and the pulse waveform is also slightly distorted.

In order to solve this problem, we devised a pulse signal baseline correction circuit according to the second embodiment shown in the detailed circuit diagram of the main parts (inverting rectifier circuit 2 and smoothing circuit 3) in FIG. . The other circuit configurations (high-pass filter 1 and addition circuit 4) in this second embodiment are as follows:
Although not shown, it has the same configuration as that of the first embodiment, and the waveforms of the signals in each part of the baseline correction circuit described in the following description of the second embodiment are the same as those of the sixth embodiment. As shown in the figure.

That is, in the baseline correction circuit according to the second embodiment, the inverting rectifier circuit 2 connects the inverting amplifier A, the input resistor R2 around it, the two feedback resistors R311+RMk, and the rectifiers Dr and Di as shown in the figure. A first inverted rectified output signal edm that is connected to each other and is configured by rectifying the negative signal portion of the processed output signal e from the high-pass filter 1, and a second inverted rectified output signal that is rectified the positive signal portion of the processed output signal e1. Output signal e. (=-e, ,).

The smoothing circuit 3 is a first inverting amplifier A. A first human resistor R4, a first feedback resistor 1/2R3, and a first capacitor 00 are connected as shown in the figure.
A smoothing circuit section 3a and a second inverting amplifier A. and the second input resistor R4b, the second feedback resistor t/2Rs, and the second
A second smoothing circuit section 3b formed by connecting a capacitor CZb as shown in the figure, an inverting amplifier A, and an input resistor R1゜1. It is composed of an adder circuit section 3C in which R3゜b+RI+ and a feedback resistor RI2 are connected as shown in the figure. The output signal ed is
The 1/2 averaged signal eas averaged at half the amplification factor of the smoothing circuit 3 in the baseline correction circuit of the first embodiment (see e in FIG. 4), that is, the high-pass filter A 1/2 rectified and averaged output signal eta of the negative signal portion of the processed output signal e1 from the second smoothing circuit section 3b is outputted, and a second inverted rectified output signal e from the inverted rectifier circuit 2 is outputted from the second smoothing circuit section 3b. . (=-e.) is
Again, the 1172 averaged signal e is averaged at half the amplification factor of the smoothing circuit 3 in the baseline correction circuit of the first embodiment (see e in FIG. 4). , that is, the processed output signal e from the high-pass filter 1,
One of the positive signal portions of the rectified and averaged output signal e.

(''-eat) is output, and these 1/2 rectified averaged output signal eaa and 11/2 rectified averaged output signal e
. (--e, ,) are input to the addition circuit section 3C using the inverting amplifier A and added (Cl1k which is a negative component
As a result, the original averaged signal e, that is, the high-pass filter l
A rectified and averaged output signal e of the positive and negative signal portions of the processed output signal e1 is output.

According to this circuit configuration, as is clear from FIG.
In the smoothing circuit 3, the ripple remaining in the 1/2 rectified and averaged output signal eta output from the first smoothing circuit section 3a and the 1/2 rectified and averaged output signal e output from the second smoothing circuit section 3b. The ripples remaining in the .
is linear without any ripples, and therefore, the final output signal e0 obtained by adding this linear rectified and averaged output signal e to the processed output signal e1 from the high-pass filter l is also affected by the ripple. The baseline can almost completely match the zero base at all times without any distortion of the pulse waveform.

FIG. 7 shows the overall schematic block circuit configuration of the pulse signal baseline correction circuit according to the third embodiment, and this is based on the basic configuration of the correction circuit portion of the baseline correction circuit shown in FIG. Inverting rectifier circuit 2. Smoothing circuit 3.
This example illustrates a case where the baseline correction accuracy is further improved by serially combining the adder circuits 4) in multiple stages (two stages in this example).

That is, in this example, the basic configuration includes a high-pass filter 1 and a (first) inverting rectifier circuit 2. Smoothing circuit 3. In addition to the adder circuit 4, a second inverting rectifier circuit 2° smoothing circuit 38. Addition circuit 4.
are provided in a similar connection relationship.

When such a circuit configuration is adopted, the negative signal portion (zero base error) in the signals , + output from the (first) adder circuit 4 is EA'' as explained in the previous [Operation] section. /E, so the signal e rectified and averaged by the second inverting rectifier circuit 2□ and the smoothing circuit 3t is converted from E in the previous equation 0 to this EA" /E
By substituting the above formula 0, tE.

e consideration t8 E E　EA　　　Ex E E E” obtained as.

Therefore, the rectified and averaged signal eat of the negative signal portion of the signal e0° outputted from the (first) addition circuit 4 obtained by this equation ■° is processed by the second addition circuit 4□. ) Signal eo'' output from the adder circuit 4
The baseline e of the final output signal eo obtained in addition to e.

0 becomes E E EX by replacing E in the previous formula 0 with this EA ''/E and substituting the formula ■' above, and the deviation of the baseline e0° of the final output signal e0 from the zero base is , as is clear from the above equation ■゛, -E, /E''
It can be seen that it can be further reduced to . As a specific example, as in the case of the previous basic example, T=1. t=0.9
If you calculate for the case, -E, 3/E" = -0, OOI E...
・■, which means that it is a two-finger move compared to before correction (-EA).

As a general expression, the baseline e0° of the final output signal e0 when the basic configuration of the correction circuit portion is combined in series in multiple stages (n stages) is E'1.

〔Effect of the invention〕

As is clear from the detailed description above, in the pulse signal baseline correction circuit according to the present invention, an input pulse signal whose baseline fluctuates at a relatively low frequency is simply processed by a high-pass filter as in the conventional configuration. Instead of processing, the negative signal portion of the processed output signal from the high-pass filter is rectified by the inverting rectifier circuit and the smoothing circuit, and the negative signal portion of the processed output signal from the high-pass filter obtained by these is rectified by the inverting rectifier circuit and the smoothing circuit. Since the rectified and averaged output signal in the signal part and the processed output signal from the high-pass filter are added by an adder circuit, it has a relatively simple and inexpensive circuit configuration, but even if the input pulse Low frequency fluctuations in the input pulse signal can be eliminated even when the signal frequency is high, without requiring manipulations such as shortening the time constant of a high-pass filter that may result in distortion of the pulse waveform or other disadvantages. It is possible to reliably remove the pulse height and obtain a final output signal whose baseline matches well with the zero base, so that subsequent pulse height measurements etc. can be performed with high accuracy. This remarkable effect is exhibited, and therefore, the industrial utility value of the present invention is extremely large.

[Brief explanation of drawings]

1 and 2 are a basic block circuit configuration diagram (diagram corresponding to claims) of a pulse signal baseline correction circuit according to the present invention and a final output signal waveform diagram for explaining the operation. 3 to 7 show various specific embodiments of the present invention, FIG. 3 is an overall detailed circuit diagram of a pulse signal baseline correction circuit according to the first embodiment, and FIG. 4 is a detailed circuit diagram thereof. FIG. 5 is a detailed circuit diagram of a main part of a pulse signal baseline correction circuit according to the second embodiment, and FIG. 6 is a waveform diagram of signals in each part of the circuit. , FIG. 7 is a block circuit configuration diagram of a pulse signal baseline correction circuit according to a third embodiment. FIGS. 8 and 9 are for explaining the technical background of the present invention and problems of the prior art,
FIG. 8 shows a schematic waveform of a pulse signal to which the present invention is applied and a conventional baseline correction circuit for pulse signals; FIG. The mouth> and <H> shows the final output signal waveform diagram for explaining the problem. el...input pulse signal, 1...high pass filter ewa...processed output signal, 2...inverting rectifier circuit, e4...inverting rectifier output signal, 3... ...Smoothing circuit, el...Inverted rectification and averaging output signal, 4...Addition circuit, eo...Final output signal.

Claims (1)

[Claims] A circuit for correcting the baseline of a pulse signal whose baseline fluctuates at a relatively low frequency so as to match the zero base, the circuit comprising: a high-pass filter to which the pulse signal is input; An inverting rectifier circuit that rectifies the negative signal portion of the output signal processed by the high-pass filter, a smoothing circuit that averages the inverted rectified output signal of the inverting rectifier circuit, and a processed output signal from the high-pass filter obtained by the smoothing circuit. and an addition circuit that outputs a final output signal obtained by adding the rectified and averaged output signal of the negative signal portion of the high-pass filter to the processed output signal from the high-pass filter. circuit.