JPS63224370A - Manufacture of semiconductor element - Google Patents

Abstract

PURPOSE:To enhance the reproducibility and to improve the reliability of size by leaving only a metal layer laminated on the sidewall of an insulating film layer stand in contact with an active layer. CONSTITUTION:An insulating film layer 4 selectively remains on a main surface which includes the active layer 3 of a substrate 2, and a metal layer for obtaining a Schottky junction is formed on the layers 3, 4. Then, the metal layer is etched by an anisotropic dry etching from a direction perpendicular to the substrate 2 to allow only the metal layer laminated on the sidewall of the layer 4 to remain in a contact with the layer 3. Since the size of the Schottky junction of a gate electrode 1' contacting the layer 3 at this time is determined by a ratio of thicknesses of a parallel part to a substrate face on the layers 3, 4 to the sidewall of the film 4, the dimensional accuracy and the reproducibility are easily managed by a photoetching technique. Thus, the gate electrode of a high yield MESFET can be formed with an inexpensive facility.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for manufacturing a white-to-key junction field effect transistor.

[Conventional technology]

Conventionally, when forming the gate electrode which becomes the front and back junction, this short-cut key junction field effect transistor (hereinafter referred to as MESFET) has been manufactured using photolithography technology. A friend who has decided on the dimensions of the section.

[Problem that the invention seeks to solve]

In the conventional MESFET gate formation method described above, the dimensions of the formed gate electrode depend on the transfer accuracy of the photolithography technique used, so even if minute dimensions are required, the reliability of these dimensions is low. Furthermore, the reproducibility was low, which greatly affected the yield of devices.

In order to improve the characteristics of the device, the gate electrode size should be 0.5 μm or less, and should be 0.2 μm to 0.3 μm.
Dimensions such as μm are required, and photo-engraving methods using electron beams, ion beams, X-rays, etc. have been developed, but the transfer accuracy is highly dependent on the single-gate processing technology. , reliability in reproducibility and dimensions is low;
This is the biggest reason why the yield of devices does not improve.

The purpose of the present invention is to solve the above-mentioned drawbacks, to achieve high reproducibility,
It is an object of the present invention to provide a method for manufacturing a semiconductor device that increases reliability regarding dimensions.

[Means for solving problems]

The structure of the method for manufacturing a semiconductor device of the present invention includes a step of selectively leaving an insulating film layer on the main surface including the active layer of the substrate;
A step of forming a metal layer on the active layer and the insulating film layer to obtain a Sivayt key junction, and an anisotropic dry etching method from a direction perpendicular to the substrate to remove the metal layer. The method is characterized by including a step of leaving only the metal layer laminated on the side wall of the insulating film layer in contact with the active layer by etching.

〔Example〕

FIGS. 1(a) to 1(C) are cross-sectional views showing a method for manufacturing a semiconductor device according to an embodiment of the present invention in the order of steps.

First, as shown in FIG. 1(a), 81
An insulating film 4, for example SIO, is formed to a thickness of 0.5 μm on the substrate provided with the active layer 3 by ion implantation. Next, the insulating film 4 is etched by photolithography, as shown in FIG. 1(b).
The gate electrode 1, for example, VSt (3000λ), is selectively processed as shown in FIG.
is formed by a sputtering method or the like.

Next, the electrode 1 is etched by an anisotropic dry etching technique using SF6 gas.

At this time, as shown in FIG. 1(C), when the etching of the gate electrode 1 on the insulating film 4 and the active layer 3 is completed, the gate electrode 1' in contact with the side wall of the insulating film 4 is completely removed. will be left behind. The gate length at this time is equal to the thickness of the deposited metal film, which is 0.3 μm. With the above steps, the formation of the gate 'FIL pole is completed.

Next, by forming an ohmic electrode, a MESF'ET having a tokiohmic contact layer 5 as shown in FIG. 2 is obtained. That is, FIG. 2 shows the 9ME manufactured according to this embodiment.
It is a sectional view of 8FET. In the figure, gate electrode 1
' is a metal layer for obtaining a shut-key junction, and is in contact with the active layer 3 provided on the semi-insulating substrate 2, and also in contact with the side wall of the insulating film 4 formed on the semi-insulating substrate.

FIG. 3 is a sectional view showing a semiconductor device manufactured by a method for manufacturing a semiconductor device according to another embodiment of the present invention. IW
In figure J, the gate electrode 1' is .

This is a metal layer for obtaining a toky junction, and is in contact with the active layer 3 provided on the semi-insulating substrate 2, and also in contact with the side wall of the insulating film 4 formed on the semi-insulating substrate 2. In this example,
Although this is an example in which a metal layer is left on the outside of the insulating film pattern, it is clear that it can be formed in the same manner as the manufacturing method shown in FIGS. 2(a), 2(b), and 2(c).

In contrast to the conventional photo-etching technique used to form the 11E electrode at the contact point, in the present invention, the dimensions of the gate electrode at the contact point C can be formed in sub-micrometers without using the photo-etching technique. MIF with low cost and good reproducibility
It is possible to provide ET.

〔Effect of the invention〕

As described above, according to the present invention, a gate electrode is formed on the sidewall of the insulating polished O through the metal layer left by anisotropic etching. At this time, the dimensions of the Schottky junction of the gate electrode in contact with the active layer do not depend much on photo-etching technology or processing precision, and are determined by the spacing technology that does not involve stacking the gate electrodes. Dimensional accuracy and reproducibility are determined by the ratio of the thickness of the layer parallel to the substrate surface on the film and active layer to the sidewall of the insulating film, so its dimensional accuracy and reproducibility are
The effect of this method is that it is easier to manage than the photo-etching technique.

In addition, especially when the dimension of the Sittky joint is α3μm or less, it has excellent dimension M degree and reproducibility, and compared to photolithography methods such as electron beam, ion beam, and xIIIM, it can achieve high yield with low cost trial. This has the effect of forming a pole for the ME8FET.

[Brief explanation of the drawings] Figure 1 (a), Figure 1 (b), and Figure 1 (C) are
- Cross section 1 vaguely showing the manufacturing method of the semiconductor device of the example
FIG. 2 is a cross-sectional view of a semiconductor device manufactured according to one embodiment of the present invention, and FIG. 3 is a cross-sectional view of a semiconductor device manufactured according to another embodiment of the present invention. 1.1'...Gate electrode, 2...Semi-insulating substrate, 3...Active layer, 4...Insulating film, 5... ...Oh no, contact layer.

Claims (1)

[Claims] selectively leaving an insulating film layer on the main surface of the substrate including the active layer; forming a metal layer on the active layer and the insulating film layer to obtain a Schottky junction; etching the metal layer using an anisotropic dry etching method in a direction perpendicular to the substrate, leaving only the metal layer laminated on the sidewall of the insulating film layer in contact with the active layer; A method for manufacturing a semiconductor device, comprising the steps of: