JPS63224249A - High-frequency integrated circuit - Google Patents
High-frequency integrated circuitInfo
- Publication number
- JPS63224249A JPS63224249A JP5914187A JP5914187A JPS63224249A JP S63224249 A JPS63224249 A JP S63224249A JP 5914187 A JP5914187 A JP 5914187A JP 5914187 A JP5914187 A JP 5914187A JP S63224249 A JPS63224249 A JP S63224249A
- Authority
- JP
- Japan
- Prior art keywords
- capacitor
- integrated circuit
- electrodes
- frequency integrated
- layered structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims abstract description 30
- 239000012212 insulator Substances 0.000 claims abstract description 8
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 239000000758 substrate Substances 0.000 abstract description 2
- 230000003247 decreasing effect Effects 0.000 abstract 2
- 230000000694 effects Effects 0.000 description 4
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
Landscapes
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、高周波帯の集積回路に関するものである。[Detailed description of the invention] [Industrial application field] The present invention relates to a high frequency band integrated circuit.
以下、高周波集積回路として、モノリシックマイクロ波
集積回路増幅器(MMIC増幅器)を例にとって説明す
る。Hereinafter, a monolithic microwave integrated circuit amplifier (MMIC amplifier) will be explained as an example of a high frequency integrated circuit.
第3図は従来のMMIC増幅器の一例を示す平面図であ
る。この図において、1は高周波トランジスタ、2は抵
抗、3はコンデンサ、4は入力信号端子、5は出力信号
端子、6は前記高周波トランジスタ1の直流バイアス印
加端子である。FIG. 3 is a plan view showing an example of a conventional MMIC amplifier. In this figure, 1 is a high frequency transistor, 2 is a resistor, 3 is a capacitor, 4 is an input signal terminal, 5 is an output signal terminal, and 6 is a DC bias application terminal of the high frequency transistor 1.
次に、MMIC増幅器の動作について説明する。入力信
号端子4に印加された信号は高周波トランジスタ1によ
り増幅され、出力信号端子5から取り出される。ここで
、高周波トランジスタ1を動作させるための直流バイア
スは、直流バイアス印加端子6より供給される。コンデ
ンサ3および抵抗2は高周波トランジスタ1の人、出力
インピーダンスを所定の特性インピーダンスにインピー
ダンス整合させるために用いられる。Next, the operation of the MMIC amplifier will be explained. A signal applied to the input signal terminal 4 is amplified by the high frequency transistor 1 and taken out from the output signal terminal 5. Here, a DC bias for operating the high frequency transistor 1 is supplied from a DC bias application terminal 6. The capacitor 3 and the resistor 2 are used to impedance match the output impedance of the high frequency transistor 1 to a predetermined characteristic impedance.
(発明が解決しようとする問題点1
以上のように構成された従来のMMIC増幅器では、増
幅器に要求される特性や使用周波数によっては大容量の
コンデンサが必要となる。その結果、コンデンサの面積
が増大し、MMIC増幅器パターンの大部分がコンデン
サパターンとなり、MMICチップの大面積化によるコ
ストアップの問題と、広面積のコンデンサパターン配置
によるMMIC回路設計が困難になる等の問題点があっ
た。(Problem to be Solved by the Invention 1) In the conventional MMIC amplifier configured as described above, a capacitor of large capacity is required depending on the characteristics required of the amplifier and the frequency of use.As a result, the area of the capacitor is As a result, most of the MMIC amplifier patterns are capacitor patterns, resulting in problems such as increased costs due to the larger area of the MMIC chip and difficulty in designing an MMIC circuit due to the large area capacitor pattern arrangement.
この発明は、上記のような問題点を解消するためになさ
れたもので、コンデンサの占有面積を減らした小形の高
周波集積回路を得ることを目的とする。The present invention was made to solve the above-mentioned problems, and an object of the present invention is to obtain a compact high-frequency integrated circuit in which the area occupied by the capacitor is reduced.
(問題点を解決するための手段)
この発明に係る高周波集積回路は、半導体基板上に形成
されるコンデンサパターンを多層の電極および絶縁体か
ら構成された積層構造としたものである。(Means for Solving the Problems) In the high frequency integrated circuit according to the present invention, a capacitor pattern formed on a semiconductor substrate has a laminated structure composed of multilayer electrodes and insulators.
この発明においては、コンデンサが積層構造に構成され
ているために、多数のコンデンサを並列接続した場合と
同様の大容量が得られることになり、コンデンサパター
ンの占有面積を減少することができる。In this invention, since the capacitor has a laminated structure, a large capacity similar to that obtained by connecting a large number of capacitors in parallel can be obtained, and the area occupied by the capacitor pattern can be reduced.
以下、この発明の一実施例を図面について説明する。 An embodiment of the present invention will be described below with reference to the drawings.
第1図はこの発明の一実施例を示すMMIC増幅器の平
面図であり、第2図は第1図の要部の拡大断面図である
。FIG. 1 is a plan view of an MMIC amplifier showing an embodiment of the present invention, and FIG. 2 is an enlarged sectional view of the main part of FIG.
第1図において、31はこの発明による積層化されたコ
ンデンサであり、第2図にその部分の詳細な断面図を示
す。In FIG. 1, numeral 31 is a laminated capacitor according to the present invention, and FIG. 2 shows a detailed sectional view of that part.
第2図に示すように、コンデンサ31の一方の電極30
1と他方の電極3020間に絶縁体303が形成され、
これらが積層化された構造である。As shown in FIG. 2, one electrode 30 of the capacitor 31
An insulator 303 is formed between 1 and the other electrode 3020,
These are layered structures.
このように形成されたコンデンサ31は、一対の電極3
01.302と絶縁体303が多数並列接続された状態
となり、積層の回数だけ容量が増大する。したがって、
従来の単層の平行平板コンデンサに比べて、電極の面積
を少なくして所定の容量を得ることが可能となり、MM
IC増幅器の小形化が容易に達成できる。The capacitor 31 formed in this way has a pair of electrodes 3
01.302 and the insulator 303 are connected in parallel, and the capacitance increases by the number of times of lamination. therefore,
Compared to conventional single-layer parallel plate capacitors, it is possible to obtain a specified capacitance with a smaller electrode area, and MM
Downsizing of the IC amplifier can be easily achieved.
なお、上記実施例ではMMIC増幅器について説明した
が、これに限定するものでなく、他の高周波集積回路に
適用しても同様の効果を奏することはいうまでもない。Although the above embodiment has been described with reference to an MMIC amplifier, the present invention is not limited to this, and it goes without saying that the same effect can be achieved even if the present invention is applied to other high frequency integrated circuits.
以上説明したように、この発明は集積回路基板上に形成
される電気回路部品のうち、コンデンサを多層の電極お
よび絶縁体から成る積層構造としたので、コンデンサパ
ターンの縮小化が可能となり、小形化した安価な高周波
集積回路が得られる効果がある。As explained above, in this invention, among the electric circuit components formed on the integrated circuit board, the capacitor has a laminated structure consisting of multilayer electrodes and insulators, so the capacitor pattern can be reduced, and the size can be reduced. This has the effect of providing a low-cost high-frequency integrated circuit.
第1図はこの発明の一実施例によるMMIC増幅器のチ
ップパターンを示す平面図、第2図は、第1図の要部の
詳細を示す拡大断面図、第3図は従来のMMIC増幅器
のチップパターンを示す平面図である。
図において、1は高周波トランジスタ、2は抵抗、4は
入力信号端子、5は出力信号端子、6はトランジスタの
直流バイアス印加端子、31は積層化されたコンデンサ
、301はコンデンサの一方ノ電極、302はコンデン
サの他方の電極、303はコンデンサを形成する絶縁体
である。
なお、各図中の同一符号は同一または相当部分を示す。
代理人 大 岩 増 雄 (外2名)第1図
第2図
第3図FIG. 1 is a plan view showing a chip pattern of an MMIC amplifier according to an embodiment of the present invention, FIG. 2 is an enlarged sectional view showing details of the main parts of FIG. 1, and FIG. 3 is a chip of a conventional MMIC amplifier. FIG. 3 is a plan view showing a pattern. In the figure, 1 is a high frequency transistor, 2 is a resistor, 4 is an input signal terminal, 5 is an output signal terminal, 6 is a DC bias application terminal of the transistor, 31 is a laminated capacitor, 301 is one electrode of the capacitor, 302 is the other electrode of the capacitor, and 303 is an insulator forming the capacitor. Note that the same reference numerals in each figure indicate the same or corresponding parts. Agent Masuo Oiwa (2 others) Figure 1 Figure 2 Figure 3
Claims (1)
部品を同一集積回路基板上に形成した高周波集積回路に
おいて、前記コンデンサを多層の電極および絶縁体から
構成された積層構造としたことを特徴とする高周波集積
回路。A high-frequency integrated circuit in which electric circuit components such as high-frequency transistors, resistors, and capacitors are formed on the same integrated circuit board, characterized in that the capacitor has a laminated structure composed of multilayer electrodes and insulators. .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5914187A JPS63224249A (en) | 1987-03-12 | 1987-03-12 | High-frequency integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5914187A JPS63224249A (en) | 1987-03-12 | 1987-03-12 | High-frequency integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63224249A true JPS63224249A (en) | 1988-09-19 |
Family
ID=13104745
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5914187A Pending JPS63224249A (en) | 1987-03-12 | 1987-03-12 | High-frequency integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63224249A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11330904A (en) * | 1998-05-13 | 1999-11-30 | Oki Electric Ind Co Ltd | Resonator type surface acoustic wave filter |
JP2020123606A (en) * | 2019-01-29 | 2020-08-13 | 住友電気工業株式会社 | Semiconductor device |
-
1987
- 1987-03-12 JP JP5914187A patent/JPS63224249A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11330904A (en) * | 1998-05-13 | 1999-11-30 | Oki Electric Ind Co Ltd | Resonator type surface acoustic wave filter |
JP2020123606A (en) * | 2019-01-29 | 2020-08-13 | 住友電気工業株式会社 | Semiconductor device |
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