JPH04261206A - Amplifier - Google Patents

Amplifier

Info

Publication number
JPH04261206A
JPH04261206A JP3004422A JP442291A JPH04261206A JP H04261206 A JPH04261206 A JP H04261206A JP 3004422 A JP3004422 A JP 3004422A JP 442291 A JP442291 A JP 442291A JP H04261206 A JPH04261206 A JP H04261206A
Authority
JP
Japan
Prior art keywords
substrate
circuit
elements
circuit elements
active
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3004422A
Other languages
Japanese (ja)
Inventor
Yukio Ikeda
幸夫 池田
Hajime Toyoshima
豊嶋 元
Kiyoharu Kiyono
清春 清野
Sunao Takagi
直 高木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP3004422A priority Critical patent/JPH04261206A/en
Publication of JPH04261206A publication Critical patent/JPH04261206A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/19011Structure including integrated passive components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/142Arrangements of planar printed circuit boards in the same plane, e.g. auxiliary printed circuit insert mounted in a main printed circuit

Abstract

PURPOSE:To reduce the chip size and to attain high yield when active elements are manufactured as semiconductor chips for a 1st substrate by mounting all active elements with low yield collectively onto the 1st substrate and mounting only passive circuit elements onto a 2nd substrate. CONSTITUTION:FETs 9, 10, 11 as active circuit elements are mounted onto a 1st substrate 1 and also other passive circuit elements 12, 13, 14. An output circuit 3 is also arranged on the 1st printed circuit board 1. Only the passive circuit elements 12, 13, 14 are arranged on a 2nd substrate 2. A connection bonding pad 4 is provided respectively to the 1st and 2nd substrates 1, 2, and prescribed positions are connected by a connection gold wire 5. The 1st substrate 1 is provided with active circuit elements and passive circuit elements being components of an input inter-stage matching circuit and a bias circuit or the like, and all active elements with low yield are mounted concentratingly onto the 1st substrate 1, then the chip size in the case of production of semiconductor chips is reduced and high yield is attained.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】この発明は、増幅器に関するもの
であり、たとえば、衛生通信、地上マイクロ波通信、移
動体通信等に使用する準マイクロ波、マイクロ波帯の半
導体増幅器に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an amplifier, for example, a semi-microwave or microwave band semiconductor amplifier used in satellite communications, terrestrial microwave communications, mobile communications, etc.

【0002】0002

【従来の技術】図5は、例えば、望月他、”2周波共振
形バイアス回路を用いた広帯域モノリシック増幅器”、
1990年電子情報学会春季全国大会、PP2−478
、に示された従来のマイクロ波半導体増幅器の等価回路
図、図6はパターン配置図であり、図において6は半導
体基板、7は入力端子、8は出力端子、9は第1のFE
T、10は第2のFET、11は第3のFET、12は
MIMキャパシタ、13はスパイラルインダクタ、14
は薄膜抵抗、15はゲートバイアス端子、16はドレイ
ンバイアス端子である。
2. Description of the Related Art FIG. 5 shows, for example, "Broadband monolithic amplifier using dual frequency resonant bias circuit" by Mochizuki et al.
1990 Spring National Conference of the Institute of Electronics and Information Engineers, PP2-478
, and FIG. 6 is a pattern layout diagram of the conventional microwave semiconductor amplifier shown in FIG.
T, 10 is the second FET, 11 is the third FET, 12 is the MIM capacitor, 13 is the spiral inductor, 14
1 is a thin film resistor, 15 is a gate bias terminal, and 16 is a drain bias terminal.

【0003】次に動作について説明する。入力端子7か
ら入力したマイクロ波あるいは準マイクロ波の信号は第
1のFET9、第2のFET10、第3のFET11で
増幅され出力端子8から出力される。MIMキャパシタ
12、スパイラルインダクタ13、薄膜抵抗14は入力
整合回路、出力整合回路、段間整合回路、バイアス回路
等を構成している。ゲートバイアス端子15、ドレイン
バイアス端子16にはゲートバイアス電圧、ドレインバ
イアス電圧を印加する。能動回路素子である第1のFE
T9、第2のFET10、第3のFET11および受動
回路素子であるMIMキャパシタ12、スパイラルイン
ダクタ13、薄膜抵抗14は同一の半導体基板6上に構
成されている。
Next, the operation will be explained. A microwave or quasi-microwave signal input from the input terminal 7 is amplified by the first FET 9, the second FET 10, and the third FET 11, and output from the output terminal 8. The MIM capacitor 12, spiral inductor 13, and thin film resistor 14 constitute an input matching circuit, an output matching circuit, an interstage matching circuit, a bias circuit, and the like. A gate bias voltage and a drain bias voltage are applied to the gate bias terminal 15 and the drain bias terminal 16. a first FE that is an active circuit element;
T9, second FET 10, third FET 11, and passive circuit elements such as MIM capacitor 12, spiral inductor 13, and thin film resistor 14 are formed on the same semiconductor substrate 6.

【0004】0004

【発明が解決しようとする課題】従来のマイクロ波半導
体増幅器は以上のように能動回路素子と入力整合回路、
段間整合回路、バイアス回路、出力回路等を構成する受
動回路素子を1つの半導体基板上に構成するので、比較
的低い周波数帯域で増幅器を構成する場合、チップサイ
ズが大きくなり、歩留りが低下しコストが高くなる。ま
た、使用周波数帯域が異なる数種類の増幅器を製作する
場合には能動回路素子、受動回路素子を含む半導体基板
をまるごと作り替える必要があり、歩留りの低い能動回
路素子の影響で増幅器の歩留りが低下する。さらに最終
段増幅器の出力回路を半導体基板上にモノリシックマイ
クロ波集積回路として構成しているので、マイクロスト
リップ線路、スパイラルインダクタ等の出力回路構成要
素の回路損失が大きく、出力・効率が低下する等の問題
点があった。
[Problems to be Solved by the Invention] Conventional microwave semiconductor amplifiers have active circuit elements, input matching circuits,
Passive circuit elements that make up the interstage matching circuit, bias circuit, output circuit, etc. are constructed on a single semiconductor substrate, so when constructing an amplifier in a relatively low frequency band, the chip size becomes large and the yield decreases. Cost increases. In addition, when manufacturing several types of amplifiers that use different frequency bands, it is necessary to completely replace the semiconductor substrate including active circuit elements and passive circuit elements, and the yield of the amplifier decreases due to the influence of the low-yield active circuit elements. Furthermore, since the output circuit of the final stage amplifier is configured as a monolithic microwave integrated circuit on a semiconductor substrate, the circuit loss of the output circuit components such as the microstrip line and spiral inductor is large, resulting in a decrease in output and efficiency. There was a problem.

【0005】この発明は上記のような問題点を解決する
ためになされたもので、歩留りが高く、使用周波数帯域
が異なる数種類の増幅器を容易に低コストで製作でき、
出力・効率特性が良好な増幅器を得ることを目的とする
[0005] This invention was made to solve the above-mentioned problems, and it has a high yield and can easily produce several types of amplifiers with different usable frequency bands at low cost.
The purpose is to obtain an amplifier with good output and efficiency characteristics.

【0006】[0006]

【課題を解決するための手段】第1の発明に係る増幅器
は、第1の基板にFET等の能動回路素子および入力・
段間整合回路、バイアス回路等を構成する受動回路素子
の一部を有し、第2の基板に入力・段間整合回路、バイ
アス回路等を構成する受動回路素子を有し、この第1、
第2の基板の所定の箇所を金ワイヤ等の接続手段により
接続したものである。
[Means for Solving the Problems] The amplifier according to the first invention includes active circuit elements such as FETs and input/output elements on a first substrate.
The first substrate has a part of passive circuit elements constituting an inter-stage matching circuit, a bias circuit, etc., the second substrate has passive circuit elements constituting an input/inter-stage matching circuit, a bias circuit, etc.
Predetermined locations on the second substrate are connected by connection means such as gold wires.

【0007】第2の発明に係る増幅器は、第1の基板に
FET等の能動回路素子および入力・段間整合回路、バ
イアス回路等を構成する受動回路素子の一部を有し、第
2の基板に入力・段間整合回路、バイアス回路等を構成
する受動回路素子を有し、第3の基板に出力回路を構成
し、この第1、第2、第3の基板の所定の箇所を金ワイ
ヤ等の接続手段により接続したものである。
[0007] The amplifier according to the second invention has active circuit elements such as FETs and some passive circuit elements constituting input/interstage matching circuits, bias circuits, etc. on the first substrate; The substrate has passive circuit elements constituting input/interstage matching circuits, bias circuits, etc., the output circuit is configured on the third substrate, and predetermined parts of the first, second, and third substrates are covered with gold. The connection is made by a connecting means such as a wire.

【0008】[0008]

【作用】第1の発明においては、歩留りの低い能動回路
素子を構成する第1の基板のサイズが小さくなり、第1
の基板を高歩留りで製作でき、増幅器の歩留りが向上す
る。また、第2の発明においては、周波数特性を決定す
る第2および第3の基板を取り替えることにより、使用
周波数帯域が異なる数種類の増幅器を容易に低コストで
製作できる。さらに、出力回路を誘電体基板に構成する
場合には、マイクロストリップ線路、スパイラルインダ
クタ等の出力回路構成要素の回路損失が小さく、出力・
効率が向上する。
[Operation] In the first invention, the size of the first substrate constituting the low-yield active circuit element is reduced;
substrates can be manufactured with high yield, improving the yield of amplifiers. Furthermore, in the second invention, by replacing the second and third substrates that determine the frequency characteristics, several types of amplifiers that use different frequency bands can be easily manufactured at low cost. Furthermore, when the output circuit is configured on a dielectric substrate, the circuit loss of the output circuit components such as microstrip lines and spiral inductors is small, and the output and
Increased efficiency.

【0009】[0009]

【実施例】実施例1.以下、この発明の一実施例を図に
ついて説明する。図1はパターン配置図であり、図にお
いて1は第1の基板、2は第2の基板、4は接続用ボン
ディングパッド、5は接続用金ワイヤである。この実施
例は従来のマイクロ波半導体増幅器と電気的に等価であ
り、その動作は従来のものと同様である。第1の基板1
には、FET9、10、11が能動回路素子として集め
られており、また、その他の受動回路素子12、13、
14も配置されている。あわせて、この例では、出力回
路3も第1の基板1に配置されている。さらに、第2の
基板2には、受動回路素子12、13、14のみが配置
されている。このように、歩留りの低い能動素子をすべ
て第1の基板に集中することにより第1の基板を半導体
チップで生産する場合のチップサイズが小さくなり高歩
留りを達成できることになる。
[Example] Example 1. An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a pattern layout diagram, in which 1 is a first substrate, 2 is a second substrate, 4 is a bonding pad for connection, and 5 is a gold wire for connection. This embodiment is electrically equivalent to a conventional microwave semiconductor amplifier and its operation is similar to that of a conventional microwave semiconductor amplifier. first substrate 1
, FETs 9, 10, and 11 are collected as active circuit elements, and other passive circuit elements 12, 13,
14 are also arranged. Additionally, in this example, the output circuit 3 is also arranged on the first substrate 1. Furthermore, only passive circuit elements 12, 13, and 14 are arranged on the second substrate 2. In this way, by concentrating all active elements with low yields on the first substrate, the chip size is reduced when the first substrate is produced as a semiconductor chip, and a high yield can be achieved.

【0010】実施例2.次に、第1の発明の他の実施例
について説明する。図2はパターン配置図であり、図に
おいて1は第1の基板、2は第2の基板、3は出力回路
、4は接続用ボンディングパッド、5は接続用金ワイヤ
である。この実施例は図1のマイクロ波半導体増幅器と
電気的に等価であり、出力回路3を第2の基板側に配置
したものである。
Example 2. Next, another embodiment of the first invention will be described. FIG. 2 is a pattern layout diagram, in which 1 is a first substrate, 2 is a second substrate, 3 is an output circuit, 4 is a bonding pad for connection, and 5 is a gold wire for connection. This embodiment is electrically equivalent to the microwave semiconductor amplifier shown in FIG. 1, and the output circuit 3 is placed on the second substrate side.

【0011】さらに、第1の発明の他の実施例を図3を
用いて説明する。この例は図1、図2で示した出力回路
を第2の基板2として構成したものである。このように
出力回路を別基板とすると、マイクロストリップ線路や
スパイラルインダクタ等の出力回路の回路損出が小さく
なるというメリットも生ずる。
Further, another embodiment of the first invention will be described with reference to FIG. In this example, the output circuit shown in FIGS. 1 and 2 is configured as the second substrate 2. When the output circuit is provided on a separate substrate in this way, there is also the advantage that the circuit loss of the output circuit, such as a microstrip line or a spiral inductor, is reduced.

【0012】実施例3.次に、第2の発明の一実施例に
ついて説明する。図4は、第2の発明に係るパターン配
置図であり、図において、1は第1の基板、2は第2の
基板、3は第3の基板である。この図は、半導体基板上
にFET、トランジスタ等の能動回路素子と受動回路素
子を一体構成するモノリシックマイクロ波集積回路と誘
電体基板上に金属膜を設けることにより種々の受動回路
素子を構成するマイクロ波集積回路の混成集積回路とし
て実現されるマイクロ波半導体増幅器において、能動回
路素子と入力・段間整合回路、バイアス回路等を実現す
る受動回路素子の一部を構成する第1の基板、入力・段
間整合回路、バイアス回路を構成する第2の基板、出力
回路を構成する第3の基板を有し、上記第1、第2、第
3の基板の所定の箇所を金ワイヤ等の接続手段により接
続したことを特徴とするマイクロ波半導体増幅器の例を
示したものである。また、このマイクロ波半導体増幅器
において、第1の基板として半導体基板、第2の基板と
して半導体基板または誘電体基板、第3の基板として誘
電体基板を用いることにより、出力回路の回路損失が小
さくなり、増幅器の出力・効率が向上する。また、第2
、第3の基板は周波数特性を決定する回路を有しており
、第2、第3の基板を取り替えることにより使用周波数
帯域が異なる増幅器を製作することができる。
Example 3. Next, an embodiment of the second invention will be described. FIG. 4 is a pattern layout diagram according to the second invention, and in the figure, 1 is a first substrate, 2 is a second substrate, and 3 is a third substrate. This figure shows a monolithic microwave integrated circuit that integrates active circuit elements and passive circuit elements such as FETs and transistors on a semiconductor substrate, and a microwave integrated circuit that configures various passive circuit elements by providing a metal film on a dielectric substrate. In a microwave semiconductor amplifier realized as a hybrid integrated circuit of wave integrated circuits, a first substrate, an input and It has a second substrate that constitutes an interstage matching circuit and a bias circuit, and a third substrate that constitutes an output circuit, and connects predetermined locations of the first, second, and third substrates with connection means such as gold wires. This figure shows an example of a microwave semiconductor amplifier characterized in that it is connected by. Furthermore, in this microwave semiconductor amplifier, by using a semiconductor substrate as the first substrate, a semiconductor substrate or a dielectric substrate as the second substrate, and a dielectric substrate as the third substrate, the circuit loss of the output circuit is reduced. , improves the output and efficiency of the amplifier. Also, the second
The third substrate has a circuit for determining frequency characteristics, and by replacing the second and third substrates, it is possible to manufacture amplifiers that use different frequency bands.

【0013】なお、上記実施例では、マイクロ波半導体
増幅器について説明したが、マイクロ波に限るものでは
なく、その他の周波数の電波であってもよい。また、半
導体に限るものではなく、第1の基板、第2の基板、第
3の基板が半導体基板あるいは誘電体基板あるいはその
他の基板の場合であってもよい。
[0013] In the above embodiment, a microwave semiconductor amplifier has been described, but the invention is not limited to microwaves, and radio waves of other frequencies may be used. Further, the present invention is not limited to semiconductors, and the first substrate, second substrate, and third substrate may be semiconductor substrates, dielectric substrates, or other substrates.

【0014】[0014]

【発明の効果】以上のようにこの第1と第2の発明によ
れば、歩留りの低い能動回路素子を構成する第1の基板
のサイズが小さくなり、第1の基板が高歩留りで製作で
き、増幅器の歩留りが向上する。また、第2の発明によ
れば、周波数特性を決定する第2および第3の基板を取
り替えることにより、使用周波数帯域が異なる数種類の
増幅器を容易に低コストで製作でき、さらに、出力回路
を誘電体基板に構成すれば、マイクロストリップ線路、
スパイラルインダクタ等の出力回路構成要素の回路損失
が小さく、出力・効率が向上する等の効果がある。
[Effects of the Invention] As described above, according to the first and second inventions, the size of the first substrate constituting the active circuit element with low yield is reduced, and the first substrate can be manufactured with high yield. , the yield of amplifiers is improved. Further, according to the second invention, by replacing the second and third substrates that determine the frequency characteristics, it is possible to easily manufacture several types of amplifiers with different operating frequency bands at low cost, and furthermore, the output circuit can be If configured on the body board, microstrip line,
This has the effect of reducing circuit loss in output circuit components such as spiral inductors and improving output and efficiency.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】第1の発明の一実施例によるマイクロ波半導体
増幅器のパターン図。
FIG. 1 is a pattern diagram of a microwave semiconductor amplifier according to an embodiment of the first invention.

【図2】第1の発明の他の実施例を示す図。FIG. 2 is a diagram showing another embodiment of the first invention.

【図3】第1の発明のその他の実施例を示す図。FIG. 3 is a diagram showing another embodiment of the first invention.

【図4】第2の発明の一実施例を示す図。FIG. 4 is a diagram showing an embodiment of the second invention.

【図5】従来のマイクロ波半導体増幅器の等価回路図。FIG. 5 is an equivalent circuit diagram of a conventional microwave semiconductor amplifier.

【図6】従来のマイクロ波半導体増幅器のパターン図。FIG. 6 is a pattern diagram of a conventional microwave semiconductor amplifier.

【符号の説明】[Explanation of symbols]

1  第1の基板 2  第2の基板 3  第3の基板 4  接続用ボンディングパッド 5  接続用金ワイヤ 6  半導体基板 7  入力端子 8  出力端子 9  第1のFET 10  第2のFET 11  第3のFET 12  MIMキャパシタ 13  スパイラルインダクタ 14  薄膜抵抗 15  ゲートバイアス端子 16  ドレインバイアス端子 1 First board 2 Second board 3 Third board 4 Bonding pad for connection 5 Gold wire for connection 6 Semiconductor substrate 7 Input terminal 8 Output terminal 9 First FET 10 Second FET 11 Third FET 12 MIM capacitor 13 Spiral inductor 14 Thin film resistor 15 Gate bias terminal 16 Drain bias terminal

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】  以下の要素を有する増幅器(a)少な
くとも、FET、トランジスタ等の能動回路素子を有す
る第1の基板、(b)キャパシタ、インダクタ、抵抗等
の受動回路素子を有する第2の基板、(c)第1の基板
と第2の基板の所定の回路及び素子を接続する接続手段
1. An amplifier having the following elements: (a) a first substrate having at least active circuit elements such as FETs and transistors; (b) a second substrate having passive circuit elements such as capacitors, inductors, and resistors; , (c) connection means for connecting predetermined circuits and elements of the first and second substrates.
【請求項2】  以下の要素を有する増幅器(a)少な
くとも、FET、トランジスタ等の能動回路素子を有す
る第1の基板、(b)キャパシタ、インダクタ、抵抗等
の受動回路素子を有する第2の基板、(c)出力回路を
有する第3の基板、(d)第1の基板と第2の基板と第
3の基板の所定の回路及び素子を接続する接続手段。
2. An amplifier having the following elements: (a) a first substrate having at least active circuit elements such as FETs and transistors; (b) a second substrate having passive circuit elements such as capacitors, inductors, and resistors; , (c) a third substrate having an output circuit, and (d) a connecting means for connecting predetermined circuits and elements of the first substrate, second substrate, and third substrate.
JP3004422A 1991-01-18 1991-01-18 Amplifier Pending JPH04261206A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3004422A JPH04261206A (en) 1991-01-18 1991-01-18 Amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3004422A JPH04261206A (en) 1991-01-18 1991-01-18 Amplifier

Publications (1)

Publication Number Publication Date
JPH04261206A true JPH04261206A (en) 1992-09-17

Family

ID=11583834

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3004422A Pending JPH04261206A (en) 1991-01-18 1991-01-18 Amplifier

Country Status (1)

Country Link
JP (1) JPH04261206A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11154837A (en) * 1997-09-18 1999-06-08 Sanyo Electric Co Ltd Semiconductor device, semiconductor integrated circuit and high frequency processing circuit
WO2006092855A1 (en) * 2005-03-02 2006-09-08 Mitsubishi Denki Kabushiki Kaisha Voltage controlled oscillator
JP2022532679A (en) * 2019-05-17 2022-07-15 ウルフスピード インコーポレイテッド Bias voltage connection in RF power amplifier packaging

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11154837A (en) * 1997-09-18 1999-06-08 Sanyo Electric Co Ltd Semiconductor device, semiconductor integrated circuit and high frequency processing circuit
WO2006092855A1 (en) * 2005-03-02 2006-09-08 Mitsubishi Denki Kabushiki Kaisha Voltage controlled oscillator
WO2006092890A1 (en) * 2005-03-02 2006-09-08 Mitsubishi Denki Kabushiki Kaisha Voltage controlled oscillator
JPWO2006092890A1 (en) * 2005-03-02 2008-08-07 三菱電機株式会社 Voltage controlled oscillator
JP4607176B2 (en) * 2005-03-02 2011-01-05 三菱電機株式会社 Voltage controlled oscillator
JP2022532679A (en) * 2019-05-17 2022-07-15 ウルフスピード インコーポレイテッド Bias voltage connection in RF power amplifier packaging

Similar Documents

Publication Publication Date Title
EP0949754B1 (en) High-frequency power amplifier circuit and high-frequency power amplifier module
JP4012840B2 (en) Semiconductor device
JP2002043813A (en) Directional coupler, high-frequency circuit module, and radio communication equipment
US20030209784A1 (en) Package for integrated circuit with internal matching
JPH11163642A (en) Semiconductor device and high frequency circuit using it
JP2001111364A (en) Microwave amplifier
US11451195B2 (en) Amplifying apparatus
US6710426B2 (en) Semiconductor device and transceiver apparatus
US6278329B1 (en) Low-noise amplifier stage with matching network
US6049126A (en) Semiconductor package and amplifier employing the same
JPH04261206A (en) Amplifier
JP3744828B2 (en) Semiconductor device
JPH0645810A (en) Microwave amplifier and its manufacture
JP2002171144A (en) High frequency amplifier
JP2880023B2 (en) High frequency transistor circuit
JPH04287507A (en) Field effect transistor amplifier
JPH07321130A (en) Semiconductor device
JPH07240645A (en) Microwave integrated circuit
JPS6056306B2 (en) Microwave IC device and its manufacturing method
JPH02119174A (en) Integrated high frequency amplifier
JP2002111392A (en) High-frequency low-noise amplifier
JP2001345606A (en) Mmic amplifier
JPH0145154Y2 (en)
JP2624370B2 (en) High frequency integrated circuit
JP3667136B2 (en) RF power amplifier module