JPH104322A - High frequency amplifier - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the high frequency amplifier contributing to the reduction in a board occupancy area and then miniaturization by using a multilayer board. SOLUTION: At least one transistor(TR) 10(19) is placed on a front (rear) side of a multilayer board, and a plurality of inner layers 3, 4, 5 of the multilayer board are formed as patterns as thin film layers to configure resistive elements, inductive elements or capacitive elements. Then an inter-stage matching circuit interposed between the TR 10 on the front side and the TR 19 on the rear side is configured by a plurality of the inner layers 3, 4, 5 of the multilayer board and via-holes 15 to 18 connecting the front side conductor layer 1, the rear side conductor layer 2 and the inner layers 3, 4, 5.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement for miniaturizing a high-frequency amplifier used in a wireless communication device.

[0002]

2. Description of the Related Art FIG. 2 shows a circuit configuration of a two-stage high frequency power amplifier using two field effect transistors (hereinafter referred to as "FET"). The front-stage FET 21a and the rear-stage FET 21b are provided in the same plane (for example, the front side) of the circuit board. The high frequency signal is input to the input matching circuit 22
is input to the front-stage FET 21a. Front stage FET
The high-frequency signal amplified by 21a is input to the subsequent-stage FET 21b through the interstage matching circuit 22b. Rear FET 21
b, the high-frequency signal further amplified by the output side matching circuit 22
output through c.

[0003] Input matching circuit 22a, interstage matching circuit 22
b and the output matching circuit 22c are composed of lumped constant elements 26a, 26b, 26c such as coils, capacitors, and resistors, and signal transmission lines 25a, 25b, 25c.
Further, a bias supply circuit 2 for supplying a bias voltage to the first-stage FET 21a and the second-stage FET 21b.
3a and 23b, and drain voltage supply circuits 24a and 24b for supplying a drain voltage are provided. These circuits are composed of lumped constant elements such as coils, capacitors, and resistors, and voltage supply lines.

[0004]

As described above, in the conventional high-frequency amplifier, since a plurality of FETs and their peripheral circuits are concentrated on the same plane of the substrate, the area of the substrate tends to increase, and Was difficult. Incidentally, when the fundamental wavelength to be amplified is λ, the line length of the matching circuit usually needs to ensure λ / 4. In the case of a power amplifier, if the line width is small, the electrical loss due to the transmission line increases, and the high-frequency characteristics deteriorate. Therefore, it is necessary to secure a certain line width.

An object of the present invention is to solve such a conventional problem and to provide a high-frequency amplifier which contributes to reduction of the occupied area and downsizing.

[0006]

According to the present invention, there is provided a high-frequency amplifier according to the present invention, wherein at least one transistor is disposed on each of a front surface and a rear surface of a multilayer substrate, and a plurality of inner layers of the multilayer substrate are formed of a resistor. Element, inductance element,
Alternatively, an inter-stage matching circuit that is patterned and formed as a layer of a thin film material forming a capacitance element and is interposed between a front-side transistor and a back-side transistor is configured by a plurality of inner layers of the multilayer substrate. It is characterized by.

Further, an input matching circuit interposed between the signal input terminal and the first-stage transistor and an output matching circuit interposed between the last-stage transistor and the signal output terminal also include a plurality of inner layers of the multilayer substrate. Is preferably constituted.

In addition, a line connecting the front side and the back side of the multilayer substrate may be formed so as to pass through the plurality of inner layers one by one in order. It may be formed so as to pass a plurality of times. When there is an unnecessary resistance element, inductance element, or capacitance element in the configuration of the matching circuit, the line connecting the front side and the back side passes through the layer of the thin film material constituting the element without contacting the layer. It is also preferable that it is formed as follows.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG. FIG. 1 shows a structure 2 using a multilayer substrate.
Fig. 2 schematically shows a high-frequency amplifier in a stage. FIG. 1A is a circuit block diagram on the front side of the substrate, and FIG. 1C is a circuit block diagram on the back side of the substrate. FIG. 1B is a schematic cross-sectional view exaggeratedly drawn in the thickness direction of the substrate.

Conductor layers 1 and 2 for forming a circuit pattern are provided on the front side and the back side of the substrate, and layers 3 and 4 of a thin film material constituting an inductance element, a capacitance element and a resistance element are provided in an inner layer. , 5 are insulating layers 6-9
Is provided via

A first-stage FET 1 is provided on the surface-side conductor layer 1 of the substrate.
0, an input matching circuit 11, a bias supply circuit 12, and a drain voltage supply circuit 13. The high-frequency signal input from the signal input terminal 14 is
The output is amplified by the first-stage FET 10, and the output is connected to one end of the inductance element 3 a patterned on the inner layer 3 through the via hole 15. The signal output from the other end of the inductance element 3a passes through the via hole 16 to be connected to the electrode of the capacitance element 4a formed in the inner layer 4, and further passes through the via hole 17 to be patterned into the resistance element 5a formed on the inner layer 5. To one end.
A signal output from the other end of the resistance element 5a passes through the via hole 18 and is provided on the back-side conductor layer 2 in the rear-stage FET.
Input to 19 gates.

As mentioned above, the inner layers 3, 4, 5 of the thin film material
The first-stage FET is formed by an inductance element 3a, a capacitance element 4a, a resistance element 5a, and via holes 15 to 18 connecting between the elements and the front and back surfaces.
An interstage matching circuit composed of 10 and the subsequent-stage FET 19 is configured.

On the back side of the substrate, a bias supply circuit 20 and a drain voltage supply circuit 21 for the latter-stage FET 19 are also provided. The signal further amplified by the latter-stage FET 19 reaches the conductive layer 1 on the substrate surface side via each element formed in the inner layer in the reverse order to the above-described inter-stage matching circuit, and is sent from the signal output terminal 25 to the external circuit. Output to

In other words, the capacitance of the capacitor element 4b and the resistance element 5b formed in the inner layers 4 and 5 of the thin film material, and the via holes 22 to 24 connecting between the elements and the front and rear surfaces, enable the signal to be output from the subsequent FET 19 (final stage). Terminal 25
And an output matching circuit between them. However, FIG.
In the example, the output matching circuit does not require an inductance element, so the inner layer 4 (capacitance element 4b) and the conductive layer 1 on the substrate surface side are directly connected by the via hole 24. That is, the connection line (via hole 24) passes through without contacting the inner layer 3 constituting the inductance element.

The inductance element, the capacitance element, and the resistance element formed on the inner layers 3, 4, and 5 can be formed of the same material by changing the line width and the line length. Alternatively, the resistance value can be changed. Each value can also be adjusted by changing the thickness of each inner layer. In this case, it is conceivable to change the distribution of the layer thickness within the same layer.

In the above embodiment, the front conductor layer and the back conductor layer are connected to each other by passing each element formed in each inner layer one by one, that is, passing through each inner layer once in order. However, the present invention is not limited to such a configuration. That is, the required number of elements formed in each layer is arbitrary, and the matching circuit may be configured to pass through any or all of the inner layers a plurality of times. For example, inner layer 4
Another capacitor element can be formed between the capacitor and the GND pattern of another layer, and this can be connected in parallel to the entire interstage matching circuit.

Further, in the above embodiment, the input matching circuit is formed using only the front side conductor layer. However, like the output matching circuit, the input matching circuit can be formed using the inner layer of the substrate. In an amplifier having three or more stages, it is needless to say that a plurality of interstage matching devices can be constituted by an inner layer of the substrate.

[0018]

As described above, according to the high-frequency amplifier of the present invention, the interstage matching circuit of the multistage amplifier, and furthermore, the input matching circuit and the output matching circuit can be formed by using the inner layer of the multilayer substrate. Therefore, the substrate area can be reduced and the size of the device can be reduced. Further, since the transmission line width can be increased, reduction in signal loss and improvement in high-frequency characteristics can be expected. Further, it also contributes to alleviating the influence of the signal transmission line on the matching circuit.

[Brief description of the drawings]

FIG. 1 is a schematic diagram showing a configuration of a two-stage high-frequency amplifier according to an embodiment of the present invention.

FIG. 2 is a circuit block diagram of a conventional two-stage high-frequency amplifier.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 front-side conductor layer 2 back-side conductor layer 3 thin-film inner layer for inductance element 3a inductance element 4 thin-film inner layer for capacitance element 4a capacitance element 5 thin-film inner layer for resistance element 5a resistance element 6,7,8,9 insulating layer 10 first-stage FET 11 Input matching circuit 12, 20 Bias supply circuit 13, 21 Drain voltage supply circuit 14 Signal input terminal 15-18, 22-24 Via hole 19 Subsequent FET 25 Signal output terminal

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁶ Identification code Agency reference number FI Technical display location H01L 25/11

Claims (6)

[Claims] 1. A high-frequency amplifier comprising two or more transistors connected in a multi-stage and a peripheral circuit element arranged on a substrate, wherein at least one transistor is arranged on each of a front side and a back side of a multilayer substrate. A plurality of inner layers of the multilayer substrate are patterned and formed as a layer of a thin film material constituting a resistance element, an inductance element, or a capacitance element, and inter-stage matching interposed between a front-side transistor and a rear-side transistor; A high-frequency amplifier, wherein a circuit is constituted by a plurality of inner layers of the multilayer substrate. 2. The high-frequency amplifier according to claim 1, wherein an input matching circuit interposed between the signal input terminal and the first-stage transistor is constituted by a plurality of inner layers of the multilayer substrate. 3. The high-frequency amplifier according to claim 1, wherein an output matching circuit interposed between the last-stage transistor and the signal output terminal is constituted by a plurality of inner layers of the multilayer substrate. 4. The high-frequency amplifier according to claim 1, wherein a line connecting the front surface side and the back surface side of the multilayer substrate is formed so as to pass through the plurality of inner layers once in order. 5. The high-frequency amplifier according to claim 1, wherein a line connecting the front side and the back side of the multilayer substrate is formed so as to pass through the plurality of inner layers at least partially a plurality of times. 6. A line connecting a front surface side and a back surface side of the multilayer substrate is a resistance element unnecessary for the configuration of the matching circuit.
2. The high-frequency amplifier according to claim 1, wherein the high-frequency amplifier is formed so as to pass through without contacting a layer of a thin film material constituting an inductance element or a capacitance element.