JPS6322402B2 - - Google Patents

Info

Publication number
JPS6322402B2
JPS6322402B2 JP56135888A JP13588881A JPS6322402B2 JP S6322402 B2 JPS6322402 B2 JP S6322402B2 JP 56135888 A JP56135888 A JP 56135888A JP 13588881 A JP13588881 A JP 13588881A JP S6322402 B2 JPS6322402 B2 JP S6322402B2
Authority
JP
Japan
Prior art keywords
wire
layer
copper
surface treatment
treatment layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56135888A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5838406A (ja
Inventor
Nobuo Ogasa
Akira Ootsuka
Kazunao Kudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP56135888A priority Critical patent/JPS5838406A/ja
Publication of JPS5838406A publication Critical patent/JPS5838406A/ja
Publication of JPS6322402B2 publication Critical patent/JPS6322402B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/43Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/43Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/4554Coating
    • H01L2224/45565Single coating layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Non-Insulated Conductors (AREA)
  • Insulated Conductors (AREA)
JP56135888A 1981-08-29 1981-08-29 ジユメツト線 Granted JPS5838406A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56135888A JPS5838406A (ja) 1981-08-29 1981-08-29 ジユメツト線

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56135888A JPS5838406A (ja) 1981-08-29 1981-08-29 ジユメツト線

Publications (2)

Publication Number Publication Date
JPS5838406A JPS5838406A (ja) 1983-03-05
JPS6322402B2 true JPS6322402B2 (enExample) 1988-05-11

Family

ID=15162133

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56135888A Granted JPS5838406A (ja) 1981-08-29 1981-08-29 ジユメツト線

Country Status (1)

Country Link
JP (1) JPS5838406A (enExample)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5827334B2 (ja) * 1978-04-27 1983-06-08 住友電気工業株式会社 ジユメツト線
JPS559435A (en) * 1978-07-07 1980-01-23 Toshiba Corp Composite wire

Also Published As

Publication number Publication date
JPS5838406A (ja) 1983-03-05

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