JPS6322380B2 - - Google Patents

Info

Publication number
JPS6322380B2
JPS6322380B2 JP58045403A JP4540383A JPS6322380B2 JP S6322380 B2 JPS6322380 B2 JP S6322380B2 JP 58045403 A JP58045403 A JP 58045403A JP 4540383 A JP4540383 A JP 4540383A JP S6322380 B2 JPS6322380 B2 JP S6322380B2
Authority
JP
Japan
Prior art keywords
data
memory
memories
data stored
address control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58045403A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59171093A (ja
Inventor
Hajime Yamazaki
Ryoichi Shinoda
Katsuhiro Yo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58045403A priority Critical patent/JPS59171093A/ja
Publication of JPS59171093A publication Critical patent/JPS59171093A/ja
Publication of JPS6322380B2 publication Critical patent/JPS6322380B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store

Landscapes

  • Monitoring And Testing Of Exchanges (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
JP58045403A 1983-03-18 1983-03-18 記憶回路の記憶デ−タ変更方式 Granted JPS59171093A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58045403A JPS59171093A (ja) 1983-03-18 1983-03-18 記憶回路の記憶デ−タ変更方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58045403A JPS59171093A (ja) 1983-03-18 1983-03-18 記憶回路の記憶デ−タ変更方式

Publications (2)

Publication Number Publication Date
JPS59171093A JPS59171093A (ja) 1984-09-27
JPS6322380B2 true JPS6322380B2 (enrdf_load_stackoverflow) 1988-05-11

Family

ID=12718283

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58045403A Granted JPS59171093A (ja) 1983-03-18 1983-03-18 記憶回路の記憶デ−タ変更方式

Country Status (1)

Country Link
JP (1) JPS59171093A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61205096A (ja) * 1985-03-08 1986-09-11 Nippon Telegr & Teleph Corp <Ntt> 時分割交換方式

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52153633A (en) * 1976-06-16 1977-12-20 Toshiba Corp Memory correcting system

Also Published As

Publication number Publication date
JPS59171093A (ja) 1984-09-27

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