JPS6320387B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor memory device, and particularly to a MIOS
(Metal−Insulator−Oxide−Semiconductor)
Non-volatile performance in semiconductor memory devices consisting of field effect transistors, such as repeated writing,
The present invention aims to prevent deterioration of electrical characteristics due to the number of times of erasure, and provides a semiconductor memory device with improved reliability.

In a MIOS type semiconductor memory device, for example, on a thin silicon dioxide film (O layer) on a semiconductor substrate, another insulating layer (I layer) such as a silicon nitride film, an aluminum oxide film, or another high dielectric constant film is laminated. death,
It has a structure in which a metal electrode is formed on top of it.
In a semiconductor memory device having such a structure, a trap level generated in the I layer at or near the interface between the O layer and I layer is accessed from the semiconductor side through a thin film (O layer) that serves as a tunneling medium. The threshold voltage (Vth) of the transistor is changed by injecting or ejecting electrical charge and changing its storage state, thereby storing information. In the O layer and I layer, that is, the gate insulating film of such a semiconductor memory device, (a) the amount of charge accumulated in the I layer at or near the interface between the O layer and the I layer in response to the gate applied voltage; is large, and the vertical width ΔVth (the size of the threshold voltage window) of the hysteresis curve corresponding to the charge accumulation and non-accumulation states is large.

(b) Charges in the accumulated and non-accumulated state can be retained for a longer period of time.

(c) Characteristic deterioration in terms (a) and (b) is small even when repeated write/erase operations are performed by applying a relatively high gate voltage. Such characteristics are required.

Conventionally, the disadvantages of MIOS type semiconductor storage devices are:
It is a well-known fact that the problem of short charge accumulation and retention time and characteristic deterioration due to the above-mentioned repeated writing and erasing has been pointed out. Changes in the trap level density and its distribution or an increase in the surface state density at the semiconductor substrate-insulating film interface have been pointed out as causes of characteristic deterioration due to repeated writing and erasing. For example, P channel MNOS (Metal-
In Nitride-Oxide-Semiconductor (Nitride-Oxide-Semiconductor) transistors, the hysteresis curve shifts in the negative direction with repeated writing and erasing, and the size of the threshold voltage window becomes smaller. The present inventors have experimentally confirmed the fact that the level density increases. In addition, phenomena such as dispersion and disappearance of traps are also recognized as other causes of size.

Conventionally, in the gate structure of an MNOS memory device, a multilayer film including a high-density trap center region called a metal and semiconductor thin film or cluster is formed at the interface between a silicon nitride film and a silicon oxide film or in a silicon nitride film. For example, it is possible to control the threshold voltage Vth by using it as an effective trap center.
It is known from Japanese Patent Publication No. 52-29156, Japanese Patent Publication No. 52-23534, etc. In addition, the manufacturing conditions of the silicon nitride film were changed.
It has a three-layer structure in which a silicon nitride film with high electrical conductivity and a silicon nitride film with low electrical conductivity are laminated to have a large amount of charge traps, thereby confining charge traps and localizing the trap portions. It has been proposed to improve memory retention properties by

However, according to the research conducted by the present inventors, metal and semiconductor cluster structures are not sufficient in stabilizing trap centers even though they are capable of forming high-density trap centers. In addition, in a gate structure using a silicon nitride film that can localize and confine a region with a large amount of charge trapping, memory retention characteristics are improved, but the write and erase voltages and repetition rate, which are important for nonvolatile memory devices, are improved. Improvements in resistance to deterioration due to the number of times of writing and erasing are not necessarily sufficient.

The present invention provides a novel structure that can improve such degradation resistance characteristics without impairing other memory electrical characteristics. The present inventors have discovered that the chemical composition related to the electrical properties of the insulator film on the side where the I layer is in contact with the O layer in the gate structure has a particularly large influence on the degradation resistance characteristics of MIOS semiconductor memory devices. It was found that a film with an excess of non-metallic elements is required. The principle of the present invention is, for example, to provide a film with an excess composition of metal elements on such a thin film with an excess composition of non-metal elements, and to further overlay an ordinary film with a nearly stoichiometric composition.

According to the research of the present inventors, on the side where the I layer is in contact with the O layer, for example, there is a layer with a thickness of 30 Å or less with a non-metal element excess composition relative to the stoichiometric ratio of the I layer, and a layer with a metal element excess composition. By using a structure in which layers with a thickness of 300 Å or less are sequentially provided, deterioration of characteristics such as threshold voltage fluctuations and charge retention due to repeated writing and erasing is particularly improved without impairing other memory electrical characteristics. Semiconductor substrate and O after repeated writing and erasing
We found that there was almost no increase in the interface state density of the layer. One of the causes of characteristic deterioration due to repeated writing and erasing is the approximately
It is thought that dielectric breakdown occurs in the oxide film or near the interface due to repeated application of a strong electric field of 10 ⁷ V/cm or more, but with the gate structure of the present invention, the above-mentioned local dielectric breakdown is less likely to occur, and It has also become clear that the non-metal element-rich composition film provided on the side where the I layer is in contact with the O layer has a large influence on the effect.

Hereinafter, specific embodiments of the present invention will be described using the drawings. FIG. 1 shows a part of the structure of a semiconductor memory device according to an embodiment of the present invention.
FIG. 2 is a cross-sectional view of a semiconductor memory device including a film with a non-metal element excess composition and a metal element excess composition film with respect to the stoichiometric ratio of the I layer on the side where the O layer and the O layer are in contact. In FIG. 1, 1 is a silicon semiconductor substrate of one conductivity type, 2 and 3 are source and drain regions of opposite conductivity type, 4 is a thin silicon oxide film that can serve as a tunneling medium, and 5 is a gate made of a high dielectric constant film. An insulating film 6 is a film having an excess composition of non-metallic elements relative to the stoichiometric ratio of the gate insulating film 5, 7
8 is a film having an excess composition of metal elements relative to the stoichiometric ratio of the gate insulating film 5, and 8 is a gate electrode.

As the silicon oxide film 4 serving as the tunneling medium in FIG. 1, a known silicon dioxide film formed by oxidizing a silicon substrate with oxygen was used.
In order to effectively utilize the tunneling effect, the thickness of this silicon oxide film 4 must be 10 to 50 Å. The gate insulating film 5 may be made of any high dielectric constant film such as silicon nitride film, aluminum oxide film (Al ₂ O ₃ ), tantalum oxide film (Ta ₂ O ₅ ), or aluminum nitride (AlN). However, here the silicon nitride film is grown to a thickness of 200 Å to 500 Å using the vapor phase growth method.
A was formed. As a method for producing a film 6 having an excessive composition of non-metal elements and a film 7 having an excessive composition of metal elements on the side in contact with the silicon oxide film 4, for example,
CVD (Chemical Vapor)
Deposition temperature when forming by
It is manufactured by changing the generation conditions such as the flow rate ratio of the reaction gas. In other words, when forming a silicon nitride film using the CVD method, due to differences in production conditions such as deposition temperature and flow rate ratio of silane (SiH ₄ ) or dichlorosilane (SiH ₂ Cl ₂ ) to ammonia (HN ₃ ), it is difficult to form a silicon nitride film using normal silicon nitride. (Si ₃ N ₄ ) is known to become Si-rich or N-rich relative to the stoichiometric ratio of the film, and the smaller the NH ₃ /SiH ₄ or SiH ₂ Cl ₂ ratio, the more Si
Rich metal element excess composition (Si ₃ N _4-x ),
The larger the NH ₃ /SiH ₄ or SiH ₂ Cl ₂ ratio, the more N-rich the nonmetallic element excess composition (Si ₃ N _4+y ).
This was also found in experiments conducted by the present inventors. Therefore,
By utilizing the difference in the formation conditions of silicon nitride films using the CVD method, it is possible to sequentially form a film with an excessive composition of non-metal elements and a film with an excessive composition of metal elements on a silicon oxide film, thereby obtaining the structure of the present invention. Can be done. In the embodiment of the present invention, a CVD method using dichlorosilane or silane and ammonia is used, and during the process of forming the gate insulating film 5,
Already produced by combining the following production conditions,
In order to fabricate the non-metallic element-excessive composition film 6, a silicon nitride film of 30 Å or less was formed by a CVD method under conditions of a deposition temperature of 700 to 900° C. and an NH ₃ /SiH ₄ or SiH ₂ Cl ₂ ratio of 1000 or more. In order to produce the metal element-excessive composition film 7, the deposition temperature was 700 to 900°C, NH ₃ /SiH ₄
Or under the condition that the SiH ₂ Cl ₂ ratio is 1/100 to 1/1000 of the flow rate ratio when producing a nonmetallic element excess composition film.
A silicon nitride film with a thickness of less than 300 Å was formed using the CVD method. After forming the gate insulating film in this way, an aluminum electrode was deposited as the gate electrode 8 by a normal vacuum deposition method.

FIG. 2 shows an example of the memory retention characteristics of the MIOS nonvolatile memory device obtained as described above. The horizontal axis is the retention time, and the vertical axis is the threshold voltage. It is well known that the memory retention characteristic of conventional semiconductor memory devices is that the threshold voltage decreases linearly with respect to the logarithm of time. The example device shows curved characteristics rather than straight lines. This is because, in the structure according to the present invention, a non-metal element-excessive composition film and a metal element-excess composition film are provided on the side where the I layer is in contact with the O layer in the MIOS structure.
This is thought to be the result of two regions with different trap level densities.

FIGS. 3A and 3B are diagrams showing the effects of the present invention, in which the device according to the present invention (FIG. 3B) and the conventional semiconductor memory device (FIG. 3A) are repeatedly programmed and erased ¹⁰⁶ times. This is an example of a change in the hysteresis curve. As is clear from this figure, in the device of the present invention, even after repeated writing and erasing ¹⁰⁶ times,
Almost no characteristic deterioration is observed, and a very significant improvement in reliability is observed.

Note that the non-metal element-excess film and the metal element-excess film may be a silicon nitride film containing hydrogen, aluminum oxide, aluminum nitride,
Compounds such as oxides, nitrides, or oxynitrides of niobium oxide, tantalum oxide, or silicon nitride and other metal elements may also be used.

Furthermore, a combination of silicon nitride with an excess of nitrogen as the non-metal element-excess film and aluminum oxide with an Al-excess composition as the metal element-excess film may be used. Also,
As an insulating film, it has a memory effect on oxide films.
ZnO or the like may be used and the composition ratio of ZnO may be varied.

As described above, the present invention provides a semiconductor memory device comprising an insulated gate field effect transistor having a gate of MIOS structure, in which the I layer has a chemical composition ratio or By providing at least one insulating film having different chemical compositions, for example, a film with an excessive composition of non-metal elements and a film with an excessive composition of metal elements,
This makes it possible to significantly reduce the deterioration caused by repeated writing and erasing without damaging other memory characteristics, and greatly contributes to increasing the reliability of semiconductor memory devices made of field effect transistors with MIOS gate structures. be.

[Brief explanation of the drawing]

FIG. 1 is a schematic cross-sectional view of a semiconductor memory device according to an embodiment of the present invention, FIG. 2 is a diagram showing the memory retention characteristics of the same device according to the present invention, and FIGS. 3A and 3B are each a conventional memory device. FIG. 3 is a diagram showing changes in hysteresis curves in the device according to the present invention. 1... Semiconductor substrate, 4... Silicon oxide film, 5
. . . gate insulating film, 6 . . . non-metal element excess composition film, 7 . . . metal element excess composition film.

Claims (1)

[Claims] 1. Having a metal-insulator-oxide film-semiconductor structure,
A semiconductor characterized in that the insulator has at least a first nitride film in contact with the oxide film with a non-metallic element-rich composition, and a second nitride film with a metallic element-rich composition formed thereon. Storage device. 2. The semiconductor memory device according to claim 1, wherein the first nitride film is a silicon nitride film containing excess nitrogen, and the second nitride film is a silicon nitride film containing excess silicon.