JPH0422031B2 - - Google Patents
Info
- Publication number
- JPH0422031B2 JPH0422031B2 JP16555883A JP16555883A JPH0422031B2 JP H0422031 B2 JPH0422031 B2 JP H0422031B2 JP 16555883 A JP16555883 A JP 16555883A JP 16555883 A JP16555883 A JP 16555883A JP H0422031 B2 JPH0422031 B2 JP H0422031B2
- Authority
- JP
- Japan
- Prior art keywords
- silicon nitride
- oxide film
- silicon oxide
- nitride film
- semiconductor memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims description 32
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 29
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 27
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 24
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 22
- 239000001257 hydrogen Substances 0.000 claims description 8
- 229910052739 hydrogen Inorganic materials 0.000 claims description 8
- 238000004519 manufacturing process Methods 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 7
- -1 hydrogen ions Chemical class 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 4
- 230000014759 maintenance of location Effects 0.000 description 16
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 230000006866 deterioration Effects 0.000 description 4
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- 239000012298 atmosphere Substances 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- GPRLSGONYQIRFK-UHFFFAOYSA-N hydron Chemical compound [H+] GPRLSGONYQIRFK-UHFFFAOYSA-N 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 230000005641 tunneling Effects 0.000 description 2
- 238000001947 vapour-phase growth Methods 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000005055 memory storage Effects 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Non-Volatile Memory (AREA)
Description
【発明の詳細な説明】
産業上の利用分野
本発明はMONOS（金属−酸化シリコン膜−窒
化シリコン膜−酸化シリコン膜−半導体）型の電
界効果トランジスタからなる半導体記憶装置に関
し、不揮発性能、特に記憶保持特性にすぐれた高
性能の半導体記憶装置を実現するための製造方法
に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a semiconductor memory device consisting of a MONOS (metal-silicon oxide film-silicon nitride film-silicon oxide film-semiconductor) type field effect transistor, and relates to a semiconductor memory device comprising a MONOS (metal-silicon oxide film-silicon nitride film-silicon oxide film-semiconductor) type field effect transistor. The present invention relates to a manufacturing method for realizing a high-performance semiconductor memory device with excellent retention characteristics.
従来例の構成とその問題点
従来より半導体記憶装置の１つとして、薄い酸
化シリコン膜上に窒化シリコン膜を成長させ、そ
の上に金属電極を形成したMNOS（金属−窒化シ
リコン膜−酸化シリコン膜−半導体）構造の半導
体装置がよく知られている。近年、このMNOS
型半導体記憶装置のプログラム電圧の低電圧化を
実現するために、ゲート絶縁膜のうち窒化シリコ
ン膜を薄膜化すると同時に、窒化シリコン膜表面
の熱酸化を行ない、窒化シリコン膜上に酸化シリ
コン膜を有するMONOS（金属−酸化シリコン膜
−窒化シリコン膜−酸化シリコン膜−半導体）構
造の半導体記憶装置が知られている。Conventional structure and its problems Traditionally, as one of the semiconductor memory devices, MNOS (metal-silicon nitride film-silicon oxide film), in which a silicon nitride film is grown on a thin silicon oxide film and a metal electrode is formed on the silicon nitride film, has been used as a semiconductor memory device. - Semiconductor devices with a semiconductor structure are well known. In recent years, this MNOS
In order to reduce the programming voltage of type semiconductor memory devices, the silicon nitride film of the gate insulating film is made thinner, and at the same time, the surface of the silicon nitride film is thermally oxidized to form a silicon oxide film on the silicon nitride film. A semiconductor memory device having a MONOS (metal-silicon oxide film-silicon nitride film-silicon oxide film-semiconductor) structure is known.
しかしながら、このMONOS構造の半導体記
憶装置の製造方法において、窒化シリコン膜を熱
酸化する際に、通常、900℃以上の高温を必要と
するので窒化シリコンの膜質の変化が起こり、メ
モリ特性、特に記憶保持特性の悪化をまねく問題
点を有していた。 However, in the manufacturing method of semiconductor memory devices with this MONOS structure, when thermally oxidizing the silicon nitride film, a high temperature of 900°C or higher is usually required, which causes changes in the film quality of the silicon nitride, which may affect memory characteristics, especially memory storage. This had a problem that led to deterioration of retention characteristics.
MONOS型の半導体記憶装置は、従来の
MNOS型の半導体記憶装置と同様、窒化シリコ
ン膜と極薄の酸化シリコン膜の界面、又は窒化シ
リコン膜バルク中に分布するトラツプに、半導体
側から極薄の酸化シリコン膜を介して行なわれる
電荷のトンネリング注入と、その蓄積によりトラ
ンジスタのしきい値電圧（Vth）を変化させ、情
報を記憶させるものであり、その記憶保持特性の
確保が最大の課題であり、窒化シリコン膜上を熱
酸化する場合の記憶保持特性の悪化は実用上の最
大の問題となつている。 MONOS type semiconductor storage devices are
Similar to MNOS type semiconductor memory devices, charge transfer from the semiconductor side through the ultra-thin silicon oxide film is applied to the interface between the silicon nitride film and the ultra-thin silicon oxide film, or to the traps distributed in the bulk of the silicon nitride film. Tunneling injection and its accumulation change the threshold voltage (Vth) of the transistor to store information, and ensuring the memory retention characteristics is the biggest challenge when thermally oxidizing a silicon nitride film. The deterioration of the memory retention properties of memory has become the biggest practical problem.
発明の目的
本発明の目的は、かかる問題に鑑み、
MONOS型電界トランジスタからなる半導体記
憶装置における不揮発性能、特に記憶保持特性の
すぐれた高性能を実現するための半導体記憶装置
の製造方法を提供することにある。Purpose of the invention In view of the above problems, the purpose of the present invention is to
It is an object of the present invention to provide a method for manufacturing a semiconductor memory device that achieves high performance with excellent non-volatile performance, especially memory retention characteristics, in a semiconductor memory device comprising a MONOS field transistor.
発明の構成
本発明は、要約すると、一導電型半導体基板面
に第１の酸化シリコン膜を形成する工程、前記第
１の酸化シリコン膜上に窒化シリコン膜を形成す
る工程、前記窒化シリコン膜上に第２の酸化シリ
コン膜を形成し、ついで、水素イオンを注入する
工程をそなえた半導体記憶装置の製造方法であ
り、これにより、安定性のすぐれた記憶保持特性
を実現することができる。Structure of the Invention To summarize, the present invention includes a step of forming a first silicon oxide film on the surface of a semiconductor substrate of one conductivity type, a step of forming a silicon nitride film on the first silicon oxide film, and a step of forming a silicon nitride film on the silicon nitride film. This method of manufacturing a semiconductor memory device includes the steps of forming a second silicon oxide film and then implanting hydrogen ions, thereby achieving highly stable memory retention characteristics.
実施例の説明
本発明者の研究によれば、窒化シリコン膜の熱
酸化による記憶保持特性の悪化は、窒化シリコン
膜中に含まれる水素、特にSi−Ｈ結合の含有量に
関係があり、Si−Ｈ結合の多い窒化シリコン膜は
900℃以上の温度で熱酸化を行なうことにより、
Si−Ｈ結合が少なくなり、不安定なトラツプが附
加増大され、記憶保持特性の悪化がおこることを
見い出した。すなわち、窒化シリコン膜の熱酸化
による記憶保持特性の悪化は、主に窒化シリコン
膜形成の際の水素含有量に大きく依存しているこ
とが明らかとなつた。DESCRIPTION OF EMBODIMENTS According to research conducted by the present inventors, deterioration in memory retention characteristics due to thermal oxidation of a silicon nitride film is related to hydrogen contained in the silicon nitride film, particularly the content of Si-H bonds. - Silicon nitride film with many H bonds
By performing thermal oxidation at a temperature of 900℃ or higher,
It has been found that the number of Si--H bonds decreases, the number of unstable traps increases, and memory retention characteristics deteriorate. In other words, it has become clear that the deterioration in memory retention characteristics due to thermal oxidation of a silicon nitride film largely depends on the hydrogen content during the formation of the silicon nitride film.
本発明は、上記の事実に基づいてなされたもの
で、トンネリング媒体となりうる極薄の第１の酸
化シリコン膜上に窒化シリコン膜、続いて第２の
酸化シリコン膜を形成した後に、水素イオンを注
入することにより、優れた記憶保持特性を得るこ
とができるものである。 The present invention has been made based on the above fact, and after forming a silicon nitride film and then a second silicon oxide film on an extremely thin first silicon oxide film that can serve as a tunneling medium, hydrogen ions are By injection, excellent memory retention characteristics can be obtained.
次に本発明の具体的な実施例を図面を用いて説
明する。 Next, specific embodiments of the present invention will be described using the drawings.
第１図は、本発明の製造方法の一実施例を示す
工程順断面図であり、まず第１図ａに示すように
Ｎ型のシリコン基板１に、ソース領域２、ドレイ
ン領域３を周知の選択拡散技術で形成し、その選
択拡散処理時に形成した二酸化シリコン膜４の所
定の部分を、既知のフオトエツチングで開孔した
後、この開孔部分に20Å程度の薄い酸化シリコン
膜５を、800℃、酸素雰囲気中で酸化処理した、
形成した。 FIG. 1 is a step-by-step sectional view showing an embodiment of the manufacturing method of the present invention. First, as shown in FIG. After opening a predetermined portion of the silicon dioxide film 4 formed by the selective diffusion technique by known photo etching, a thin silicon oxide film 5 of approximately 20 Å is deposited on the opening portion at a thickness of 800 Å. ℃, oxidized in an oxygen atmosphere,
Formed.
次いで、第１図ｂに示すように、酸化シリコン
膜５上に、シラン（SiH4）とアンモニア（NH3）
の化学反応にもとづく気相成長法によつて、
NH3／SiH4＝100，750℃の条件下で窒化シリコ
ン膜６を約200Å程度形成させる。 Next, as shown in FIG. 1b, silane (SiH 4 ) and ammonia (NH 3 ) are deposited on the silicon oxide film 5.
Through the vapor phase growth method based on the chemical reaction of
A silicon nitride film 6 is formed to a thickness of about 200 Å under the condition of NH 3 /SiH 4 =100.750°C.
次いで、窒化シリコン膜６の上を900℃、水蒸
気雰囲気中で約60分酸化処理し、約25Åの酸化シ
リコン膜７を形成させる。 Next, the silicon nitride film 6 is oxidized at 900° C. in a steam atmosphere for about 60 minutes to form a silicon oxide film 7 with a thickness of about 25 Å.
次いで、第１図ｃに示すように、アルミニウム
電極８を通常の真空蒸着法により被着させる。 Then, as shown in FIG. 1c, an aluminum electrode 8 is deposited by a conventional vacuum deposition method.
次いで、第１図ｄに示すように、周知の気相成
長法により、酸化シリコン膜９を全面に被着後、
水素イオン１０を全面に注入する。本実施例では
水素イオン１０としてH2 +イオンを用い、加速エ
ネルギー10KeV、注入量５×1015cm-2とした。さ
らに、注入イオンの活性化のために、本実施例で
は400℃で約30分、N2雰囲気中で熱処理を行なつ
た。以上のようにして、第１図ｄに示すＰチヤネ
ルアルミゲートMONOS型不揮発性半導体記憶
装置を作製することができる。 Next, as shown in FIG. 1d, a silicon oxide film 9 is deposited on the entire surface by a well-known vapor phase growth method.
Hydrogen ions 10 are implanted into the entire surface. In this example, H 2 + ions were used as the hydrogen ions 10, the acceleration energy was 10 KeV, and the implantation amount was 5×10 15 cm −2 . Furthermore, in order to activate the implanted ions, heat treatment was performed at 400° C. for about 30 minutes in a N 2 atmosphere in this example. In the manner described above, the P-channel aluminum gate MONOS type nonvolatile semiconductor memory device shown in FIG. 1d can be manufactured.
第２図に、上述の実施例で得られたMONOS
型半導体記憶装置の記憶保持特性の一例を、従来
例装置の特性と対比して示す。横軸は書き込み消
去直後のしきい値電圧、縦軸はその時に蓄積され
た電荷の減衰率（∂Vth／logt，Vth：しきい値電
圧、ｔ：時間）を示している。この図において直
線の傾きが小さいほど記憶保持特性が優れている
ことを示している。第２図に示すように、本発明
の製造方法により作製した半導体記憶装置の記憶
保持特性（直線１１）は、水素イオン注入を実施
していないMONOS型半導体記憶装置の記憶保
持特性（直線１２）よりもはるかに優れ、また、
従来のアルミゲートMNOS型半導体記憶装置の
うち最も良い記憶保持特性（直線１３）と比較し
ても直線の傾きにほとんど差がなく、同程度の記
憶能力を有するものを作製することができた。 Figure 2 shows the MONOS obtained in the above example.
An example of the memory retention characteristics of a type semiconductor memory device will be shown in comparison with the characteristics of a conventional device. The horizontal axis shows the threshold voltage immediately after writing and erasing, and the vertical axis shows the decay rate of the charges accumulated at that time (∂Vth/logt, Vth: threshold voltage, t: time). In this figure, the smaller the slope of the straight line, the better the memory retention characteristics are. As shown in FIG. 2, the memory retention characteristics (straight line 11) of the semiconductor memory device manufactured by the manufacturing method of the present invention are different from the memory retention characteristics (straight line 12) of the MONOS type semiconductor memory device without hydrogen ion implantation. much better than, and also
Even when compared with the best memory retention characteristics (straight line 13) among conventional aluminum gate MNOS type semiconductor memory devices, there is almost no difference in the slope of the straight line, and it was possible to fabricate one having the same level of memory capacity.
本実施例では、Ｎ型基板を用い、Ｐチヤネル型
半導体記憶装置を形成する場合について説明を行
なつてきたが、ｎチヤネル型MONOS構造でも
使用できることはもちろんであり、またゲート電
極としてポリシリコン等の高融点金属を用いても
よいことは言うまでもない。 In this embodiment, a case has been described in which a P-channel type semiconductor memory device is formed using an N-type substrate, but it is of course possible to use an n-channel type MONOS structure, and polysilicon etc. can be used as the gate electrode. Needless to say, a high melting point metal may also be used.
発明の効果
本発明の方法によれば、MONOS型半導体記
憶装置の製造方法において、窒化シリコン膜上に
酸化シリコン膜を形成した後に、水素イオン注入
を行なうことにより、記憶保持特性の優れた半導
体記憶装置を作製することができ、MONOS型
半導体記憶装置の高性能化に大きく寄与するもの
である。Effects of the Invention According to the method of the present invention, in the method of manufacturing a MONOS type semiconductor memory device, hydrogen ions are implanted after forming a silicon oxide film on a silicon nitride film, thereby achieving a semiconductor memory device with excellent memory retention characteristics. The device can be fabricated, and it will greatly contribute to improving the performance of MONOS type semiconductor memory devices.
第１図ａ〜ｄは本発明実施例の工程順断面図、
第２図は特性図である。
１……Ｎ型シリコン基板、２，３……ソースお
よびドレイン領域、４，５……酸化シリコン膜、
６……窒化シリコン膜、７……酸化シリコン膜、
８……アルミニウム電極、９……酸化シリコン
膜、１０……水素イオン。
1A to 1D are cross-sectional views in order of steps of the embodiment of the present invention,
FIG. 2 is a characteristic diagram. 1... N-type silicon substrate, 2, 3... Source and drain region, 4, 5... Silicon oxide film,
6...Silicon nitride film, 7...Silicon oxide film,
8...Aluminum electrode, 9...Silicon oxide film, 10...Hydrogen ion.
Claims (1)
ン膜を選択形成する工程、前記第１の酸化シリコ
ン膜上に窒化シリコン膜を形成する工程、前記窒
化シリコン膜上に第２の酸化シリコン膜を形成し
た後に、水素イオンを注入する工程をそなえた半
導体記憶装置の製造方法。1. A step of selectively forming a first silicon oxide film on a surface of a semiconductor substrate of one conductivity type, a step of forming a silicon nitride film on the first silicon oxide film, and a step of forming a second silicon oxide film on the silicon nitride film. A method for manufacturing a semiconductor memory device comprising a step of implanting hydrogen ions after forming a semiconductor memory device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16555883A JPS6057674A (en) | 1983-09-08 | 1983-09-08 | Manufacture of semiconductor memory device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16555883A JPS6057674A (en) | 1983-09-08 | 1983-09-08 | Manufacture of semiconductor memory device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6057674A JPS6057674A (en) | 1985-04-03 |
| JPH0422031B2 true JPH0422031B2 (en) | 1992-04-15 |
Family
ID=15814639
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16555883A Granted JPS6057674A (en) | 1983-09-08 | 1983-09-08 | Manufacture of semiconductor memory device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6057674A (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0665232B2 (en) * | 1984-07-30 | 1994-08-22 | 松下電子工業株式会社 | Method of manufacturing semiconductor memory device |
| JPH0319286A (en) * | 1989-06-15 | 1991-01-28 | Matsushita Electron Corp | Manufacture of nonvolatile semiconductor memory |
| KR100490293B1 (en) * | 2000-12-08 | 2005-05-17 | 주식회사 하이닉스반도체 | Method of manufacturing a flash memory cell |
| KR100691960B1 (en) | 2004-12-30 | 2007-03-09 | 동부일렉트로닉스 주식회사 | Method for forming SONOS device |
-
1983
- 1983-09-08 JP JP16555883A patent/JPS6057674A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6057674A (en) | 1985-04-03 |
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