JPS63177042U - - Google Patents

Info

Publication number
JPS63177042U
JPS63177042U JP1987066673U JP6667387U JPS63177042U JP S63177042 U JPS63177042 U JP S63177042U JP 1987066673 U JP1987066673 U JP 1987066673U JP 6667387 U JP6667387 U JP 6667387U JP S63177042 U JPS63177042 U JP S63177042U
Authority
JP
Japan
Prior art keywords
film carrier
circuit element
film
mounting surface
bonded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987066673U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987066673U priority Critical patent/JPS63177042U/ja
Publication of JPS63177042U publication Critical patent/JPS63177042U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP1987066673U 1987-05-01 1987-05-01 Pending JPS63177042U (US08124317-20120228-C00060.png)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987066673U JPS63177042U (US08124317-20120228-C00060.png) 1987-05-01 1987-05-01

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987066673U JPS63177042U (US08124317-20120228-C00060.png) 1987-05-01 1987-05-01

Publications (1)

Publication Number Publication Date
JPS63177042U true JPS63177042U (US08124317-20120228-C00060.png) 1988-11-16

Family

ID=30904900

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987066673U Pending JPS63177042U (US08124317-20120228-C00060.png) 1987-05-01 1987-05-01

Country Status (1)

Country Link
JP (1) JPS63177042U (US08124317-20120228-C00060.png)

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