JPS63177042U - - Google Patents
Info
- Publication number
- JPS63177042U JPS63177042U JP1987066673U JP6667387U JPS63177042U JP S63177042 U JPS63177042 U JP S63177042U JP 1987066673 U JP1987066673 U JP 1987066673U JP 6667387 U JP6667387 U JP 6667387U JP S63177042 U JPS63177042 U JP S63177042U
- Authority
- JP
- Japan
- Prior art keywords
- film carrier
- circuit element
- film
- mounting surface
- bonded
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims 1
- 239000011889 copper foil Substances 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- 239000010410 layer Substances 0.000 description 2
- 239000012790 adhesive layer Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987066673U JPS63177042U (US07847105-20101207-C00016.png) | 1987-05-01 | 1987-05-01 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987066673U JPS63177042U (US07847105-20101207-C00016.png) | 1987-05-01 | 1987-05-01 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63177042U true JPS63177042U (US07847105-20101207-C00016.png) | 1988-11-16 |
Family
ID=30904900
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987066673U Pending JPS63177042U (US07847105-20101207-C00016.png) | 1987-05-01 | 1987-05-01 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63177042U (US07847105-20101207-C00016.png) |
-
1987
- 1987-05-01 JP JP1987066673U patent/JPS63177042U/ja active Pending
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