JPS63174A - Semiconductor device - Google Patents

Abstract

PURPOSE:To connect input/output electrodes and two-dimensional electrons easily, and to simplify the formation of the electrodes and two-dimensional electrons by specifying the mixed crystal ratio (x) of AlxGa1-xAs shaping second and third semiconductor layers while specifying the impurity concentration of the third semiconductor layer and the thickness of the second semiconductor layer respectively. CONSTITUTION:The (x) value of second and third semiconductor layers 2, 3 consisting of AlxGa1-xAs is brought to a value to 0.23 from 0.15, and the impurity concentration of the semiconductor layer 3 is brought to a value to 5X10<17>cm<-3> from 1X10<16>cm<-3> so as not to shape a deep level. The thickness of the semiconductor layer 2 is brought to thickness (d) shown in formula from the necessity of the depletion of the semiconductor 2. In formula, epsilon represents the dielectric constant of the semiconductor layer 2, e the quantity of charges of electrons, ND the impurity concentration of the semiconductor layer 2 and phiapproximately 0.1V. Accordingly, the temperature change of threshold voltage and the variation of performance characteristics by optical irradiation at a low temperature are eliminated, an ohmic contact is removed easily, and the lowering of mutual conductance is prevented.

Description

[Detailed Description of the Invention] [Summary] In a heterogeneous d-junction FET, by adding impurities to the neutral region of the electron supply layer within a range that does not form a deep impurity level, temperature changes in threshold voltage can be suppressed. reduced and facilitated ohmic contact.

[Industrial application field]

The present invention relates to semiconductor devices, and in particular to improvements in so-called HEMI (high electron mobility transistors) field effect transistors that use two-dimensional electron gas generated at heterojunction interfaces of semiconductors having different electron affinities.

HEMTs are expected to be used as high-speed computer elements and high cut-off frequency transistors, and are known to operate at higher speeds, especially at lower temperatures (eg, 77K).

[Conventional technology]

FIG. 4 shows an energy band diagram of a conventional HEMT. In the figure, 1 is a GaAs layer (channel layer) that does not substantially contain impurities, and 14 is a layer containing n-type impurity Si (AflzAa
I-2As'I layer (electron supply layer), 4 is the control electrode gold pA1.5 is a neutral region, 6 is a two-dimensional electron gas, and 7 north is the Femmi level. However, Si-doped Af
A deep impurity level is formed in lxGa+-AsK, which causes the problem that the threshold voltage changes with temperature and that the operating characteristics change due to light irradiation at low temperatures (approximately 150 ℃ or less). In order to solve this problem, attempts have been made to improve HEMT. FIG. 5 shows an energy band diagram of a HEMT designed to improve the above problems.

In FIG. 5(a), impurities are added only to the depleted region 16 near the hetero interface of the electron supply layer. No. 17 is additive-free AflzGat-zA'.

In Fig. 5Cb'), the electron supply layer is a depleted region 18 near the hetero interface, and a semiconductor layer (AftzGa t -z As or GaAs) with a relatively large electron affinity (19 in the figure) is formed on top of the depleted region 18 near the hetero interface. part).

FIG. 5(1) shows an electron supply layer having a superlattice structure of AftAs 20 to which no impurities are added and GaAa 21 to which impurities are added.

[Problem that the invention seeks to solve]

However, the improvements to the conventional HEMT described above are insufficient in the following points.

In the device shown in FIG. 5(α), it was difficult to connect the two-dimensional electrons and the output electrode because the region was not doped with impurities. In addition, since the distance between the heterointerface and the control electrode becomes large, there is a drawback that the mutual conductance becomes small.

The device shown in FIG. 5(b) has a problem in that current flows also at the interface between the semiconductors 18 and 19.

Since the device in FIG. 5(1) has a superlattice structure,
The drawback was that manufacturing was complicated.

[Means for solving problems]

The present invention includes laminating a first semiconductor layer made of GaAs substantially containing impurities on a semi-insulating GaAs substrate, and second and third semiconductor layers made of AnzGa+-zAs on the semiconductor layer. and has a layer structure in which a two-dimensional electron gas is formed near the interface between the first semiconductor layer and the second semiconductor layer, and controls the carrier concentration of the two-dimensional electron gas on the third semiconductor layer. In a semiconductor device having a control electrode and a plurality of electrodes provided across the control electrode and in ohmic contact with the two-dimensional electron gas, a range in which the impurity concentration of the third semiconductor layer does not form a deep impurity level. The present invention provides a semiconductor device characterized in that the thickness of the second semiconductor layer is determined within a range that does not create a neutral region within the second semiconductor layer.

The principle and operation of the present invention will be explained in detail below using FIGS. 6 and 7.

FIG. 6 is a band diagram near the hetero interface of the present invention. The solid line represents the bottom of the conduction band, the semiconductor layer 1 is a channel layer, and the semiconductor layers 2 and 3 are electron supply layers. In FIG. 6, the symbols of each part are as follows.

φS Energy difference between the bottom of the conduction band at the hetero interface of the two semiconductor layer 1 (for example, non-doped aaAtt) and about 7 Lumiem φF: the Fermi level and the semiconductor layer 3 (for example, n-type AllG
Energy difference φ between the conduction band bottom in the neutral region in the semiconductor layer 3 and the conduction band bottom in the neutral region in the semiconductor layer 3 and the conduction band bottom at the hetero interface of the semiconductor layer 2 ΔE6: Discontinuous energy at the bottom of the conduction band at the hetero interface Since the present invention requires that no neutral region occur in the semiconductor layer 2, the thickness d of the semiconductor layer 2 is within the following range. It is necessary that there be.

where - is the specific charge of electrons (amount of charge of electrons) a is the dielectric constant of the semiconductor layer 2 NO2 is the donor concentration of the semiconductor layer 2 d is the thickness of the semiconductor layer 2 The above φ is as shown in Fig. 6, φ =ΔE6−φ, −φ, ・・・・・・−・・・
(2).

Here, when the semiconductor 1 is made of non-doped GaAa and the semiconductor 2°3 is made of AftzGa+-2Aa (Z-0,2), ΔEe ~0.2 V ・=
= (31 are known.

Also, since the donor level in the semiconductor layer 3 falls at about 5m5V below the conduction band bottom, φ can be almost ignored, and φ, ~OV...
(4) φ8 is related to the two-dimensional electron concentration fig, and
For example, Fujitts=Set, Taah, J, Vol.
, 19. No. 3rpp243-27B is shown in FIG. 12, and this is shown in FIG.

As a result of research conducted by the present invention, ng is approximately 1.5 x 1 x 1016 ctn-' when the donor concentration of the semiconductor layer 2 is approximately 1.5 x 1 x 1016 ctn-'.
Since X 1Q"cm-", according to Figure 7, φ8~0.1V...
-(5) is obtained.

(31(4) Substituting each equation (5) into (2), φ~
0.1V is obtained.

According to the above analysis, the condition that φ is approximately 0.1V was determined.

Next, from the graph of the impurity doping concentration and the ratio of forming deep levels in Fig. 2, we can see that the AkGα+-xAs mixed crystal ratio 2 is z =
It can be seen that when the value is 0.3, a deep impurity level (DX center) is generated no matter how much the impurity concentration is reduced. Then, when ya = 0.2, the impurity penetration degree is 1Q” c
It can be seen that deep impurity levels are not generated below about tn-'. As a result of detailed study, taking into consideration that in practical terms, it is acceptable to create a deep impurity level at a rate of about 10 yen.
If the mixed crystal ratio 2 of AftzGat-2As is 0.15 or more, based on the above formula (11), 1 is the dielectric constant of the second semiconductor layer, - is the amount of electron charge, and NO is the second semiconductor layer. When the impurity concentration and φ are approximately 0.1 V, the thickness d of the second semiconductor layer is: [Embodiment] FIG. 1 is an energy band diagram of a semiconductor device according to an embodiment of the present invention. 1 In the figure, 1 is G that does not substantially contain impurities.
In the aAs layer (channel layer), 2 is a second semiconductor layer, 3 is a third semiconductor layer, and a neutral region 5 is generated. 4 is a control electrode metal, and by the voltage applied to it, the Ga of 1
A, s The two-dimensional electron concentration n8 designated as 6 formed in the channel layer is controlled.

7 indicates the Fermi level. Further, φ represents the energy difference between the conduction band bottom at the neutral region in the semiconductor layer 3 and the conduction band bottom at the hetero interface of the semiconductor layer 2.

FIG. 2 shows the doping concentration dependence of the deep impurity ratio in KSi-doped A1zGa1-2As. As shown in FIG. 2, when St is added to AflzGα1-2 As, the rate at which deep impurity levels are formed is determined depending on the binary value and the amount added. In order to maintain a large two-dimensional electron concentration and mutual conductance, the second semiconductor layer 2 is 1X 1Q"a
The x value needs to be 0.15 or more in order to maintain high two-dimensional electron mobility. - On the other hand, as the binary value increases, the ratio of forming deep levels increases, so it is necessary that it be 0.23 or less. Based on these requirements, the range of binary values and impurity concentrations is determined.

Further, in order to prevent the formation of a deep level in the third semiconductor layer, the impurity concentration is 5 x 1Q"am-'
Below, it is necessary that I x 1×10 16 c-n%-3 or more. Furthermore, since the second semiconductor needs to be depleted, the thickness d of the second semiconductor layer is determined from the above equation.

FIG. 3 shows an embodiment of the present invention in a sectional view of the main parts of the device. In the figure, the symbols for each part are the same as those in Figure 1, and 8 is a GaAs substrate, 1 is a GaAs substrate with no impurities added.
aAa (channel layer), 2.3 are each S(1×
AftzGal-zAs (z = 0.2), 9
is GaAn with modified St addition of 1Q"6m-5, 10,
11 is an input/output electrode, and 12 is a control electrode. By setting the thickness of the semiconductor layer 2 to 80A, the semiconductor layer 2 can be completely depleted, and since z = 0.2, the St concentration is 1.
There are almost no deep impurity levels at ×1016c, m-'. Therefore, there is no change in the threshold voltage due to temperature changes or changes in operating characteristics due to light irradiation at low temperatures, υ, and ohmic contact can be easily established and mutual conductance does not decrease.

〔Effect of the invention〕

According to the present invention, the temperature change in the threshold voltage is small, the operation is stable at low temperatures, the connection between input/output electrodes and two-dimensional electrons is easy, and current flows through the two-dimensional electron layer. , a structure that is not complicated to manufacture can be obtained.

[Brief explanation of the drawing]

FIG. 1 is an energy band diagram of a device according to an example of the present invention, FIG. 2 is a doping concentration dependence of the proportion of deep impurity levels in S (doped A1zGa+-2Aa), and FIG. 3 is a cross-section of a main part of a device according to an example. Figure 4 is the HEMT energy band diagram, Figure 5 (, )~
(6) is an energy band diagram showing the conventional example, FIG. 6 is a band diagram near the Peter interface in the present invention, and FIG. 7 is a diagram showing two-dimensional electron concentration. 1... Impurity-free GaAs 2.14+16.18-n type A1. zGα, -2A11
3...AizGa+-2At4 with a relatively small amount added
... Control electrode metal 5 ... Neutral region 6 ... Two-dimensional electron gas 7 ... Fermi level 8 ... GaAs substrate 9 ... GaAs cap layer 10.11.12 ... Electrode 17... Additive-free A2zGtL+-zAj19... A1zGa+-zAa20 with relatively high electron affinity...
・Additive-free A1. As21-=Si-doped GaAs

Claims (1)

[Claims] (1) A first semiconductor layer made of GaAs substantially free of impurities is laminated on a semi-insulating GaAs substrate, and second and third semiconductor layers made of Al_xGa_1_-_xAs are laminated on the semiconductor layer. The first semiconductor layer has an epitaxial layer structure in which a two-dimensional electron gas is formed near the interface with the second semiconductor layer, and a control electrode for controlling the carrier concentration of the two-dimensional electron gas is provided on the third semiconductor layer. , in a semiconductor device having a plurality of electrodes that are provided to sandwich the control electrode and make ohmic contact with the two-dimensional electron gas, Al_xGa forming the second and third semiconductor layers;
_1_-_xThe mixed crystal ratio x of As is 0.15 or more and 0.23 or less, and the impurity concentration of the third semiconductor layer is 5×10
^1^7cm^-^3 or less 1x10^1^6cm^-^
3 or more, ■ is the dielectric constant of the second semiconductor layer, ■ is the amount of electron charge, N_D is the impurity concentration of the second semiconductor layer, and φ is about 0.1 V, then the second semiconductor layer A semiconductor device characterized in that the thickness d of the semiconductor device satisfies the following: √(2■ψ/■N_D)<d.