JP2768794B2 - Semiconductor device - Google Patents

Description

The present invention relates to a semiconductor device, and more particularly, to a semiconductor device having a heterojunction and a normally-off FE without lowering electron mobility.
In order to provide a semiconductor device that can be T, an InP substrate, and an undoped layer formed on the InP substrate.
An InAsP channel layer, an N-type InAlAs electron supply layer formed on the InAsP channel layer, a source and drain electrode formed on the N-type InAlAs electron supply layer, and sandwiched between the source and drain electrodes. A gate electrode formed on the N-type InAlAs electron supply layer, wherein the thickness of the InAsP channel layer is smaller than a critical thickness at which dislocations occur in crystals due to lattice mismatch, and is applied to the gate electrode. The voltage is used to control the concentration of the two-dimensional electron gas formed in the InAsP channel layer.

The present invention relates to a semiconductor device, and more particularly, to a semiconductor device having a heterojunction.

[Related Art] In recent years, the development of high-speed transistors for use in supercomputers or microwave communication has been promoted. In response to such demands, for example, a high electron mobility (HEMT) using InGaAs as a channel material.
ty Transistor) and IGFET (Insulated Gate Field Effec)
t Transistor).

 FIG. 9 shows a conventional HEMT.

An undoped In _0.53 Ga _0.47 As channel layer 36 is formed on the InP substrate 2 via an In _0.52 Al _0.48 As buffer layer 4. On the In _0.53 Ga _0.47 As channel layer 36, N
The type In _0.52 Al _0.48 As electron supply layer 38 is formed to form a heterojunction. A source electrode 12 and a drain electrode 14 made of AuGe / Au are provided on the N-type In _0.52 Al _0.48 As electron supply layer 38 via an n-type In _0.53 Ga _0.47 As cap layer 10.
Are formed. A gate electrode 16 made of, for example, Al is formed on the N-type In _0.52 Al _0.48 As electron supply layer 38 interposed between the source electrode 12 and the drain electrode 14.

In such an HEMT, since the channel layer is an InGaAs layer, the electron mobility μ is about
As high as 10000 cm ² / Vs, the conduction band discontinuity ΔE _C between the N-type InAlAs electron supply layer and the InGaAs channel layer is as high as 0.53 eV, and the maximum two-dimensional electron gas concentration is as large as about 2 × 10 ¹² cm ^−2. It has the characteristic that a value can be obtained.

[Problems to be Solved by the Invention] A DCFL (Direct Coupled FET Logic) circuit is the most excellent circuit type for compound semiconductor FET integration.
This circuit is composed of a normally-off type FET and a normally-on type FET connected in series, and has a very simple configuration, so that it is suitable for integration. In addition, low power consumption due to the use of normally-off type FETs is a factor more suitable for integration.

In general, the threshold voltage V _TH of the HEMT is represented by V _TH = ψ− △ E _C −qN _D d ² / 2ε. Here, the height, △ E _C is the conduction band discontinuity between the electron supply layer and the channel layer, q is the elementary charge, N _D is the doping concentration of the electron supply layer of ψ gate Schottky barrier, d
Is its thickness and ε is its dielectric constant.

HEM of the above conventional N-type In _0.52 Al _0.48 As / In _0.53 Ga _0.47 As
At T, the height ゲ ー ト of the gate Schottky barrier between the gate electrode 16 and the N-type In _0.52 Al _0.48 As electron supply layer 38 is ψ
= 0.6 eV, N-type In _0.52 Al _0.48 As electron supply layer 38 and In _0.53 Ga
_0.47 The conduction band discontinuity ΔE _C with the As channel layer 36 is given by ΔE _C =
0.53 eV. Now, the N-type In _0.52 Al _0.48 As electron supply layer 38
The doping concentration N _D, as ^{_{N D = 1.5 × 10 18 cm}} -3, the threshold voltage V _TH and N-type In _0.52 Al _0.48 As the thickness d of the electron supply layer 38
Is obtained as shown in the graph of FIG.

Therefore, N-type In _0.52 Al _0.48 As / In _0.53 Ga _0.47 As HEMT
Threshold voltage V _TH must be V
_TH > 0 must be satisfied, which is due to N-type In _0.52 Al _0.48 As
The thickness d of the electron supply layer 38 must be d <65 °. However, when the thickness d of the N-type In _0.52 Al _0.48 As electron supply layer 38 is such a small value, the gate leakage current is significantly increased, and normal operation of the device is hindered.

Moreover, in order to obtain a good DCFL circuit, the threshold voltage V _TH of the normally-off type FET needs to be 0.1 V or more. However, as is evident from FIG. 5, it is not feasible. Therefore, the conventional HEMT using InGaAs as a channel material has a problem that it is difficult to configure a DCFL circuit as a basic circuit.

To solve this problem, the HEMT threshold voltage V
To achieve a normally-off type FET by increasing the _TH, it is necessary to increase the height の of the gate-Schottky barrier or to increase the conduction band between the electron supply layer and the channel layer from the above equation. What is necessary is just to make the discontinuity △ E _C small. Gate and Schottky barrier height ψ is metal and N-type
Since the Schottky junction with the InAlAs electron supply layer is regulated to a substantially constant value, the conduction band discontinuity ΔE _C may be reduced.

For example, if the InAlGaAs channel layer is formed by adding Al to the InGaAs channel layer, the band gap Eg of InAlGaAs increases, and thus the conduction band discontinuity ΔE _C with the N-type InAlAs electron supply layer can be reduced. However, in the case of the InAlGaAs channel layer, the electron mobility μ becomes small, and the device performance is reduced.

Therefore, the present invention, without reducing the electron mobility,
It is an object to provide a semiconductor device which can be a normally-off type FET.

[Means for Solving the Problems] The problem is solved by providing an InP substrate, an undoped InAsP channel layer formed on the InP substrate, an N-type InAlAs electron supply layer formed on the InAsP channel layer, N-type InAl
A source and drain electrode formed on the As electron supply layer, and the N sandwiched between the source and drain electrodes.
A gate electrode formed on a type InAlAs electron supply layer, the thickness of the InAsP channel layer is smaller than a critical thickness at which dislocations occur in crystals due to lattice mismatch, and a voltage applied to the gate electrode, This is achieved by a semiconductor device characterized by controlling the concentration of a two-dimensional electron gas formed in the InAsP channel layer.

Further, in the above device, the P of the InAsP channel layer
By controlling the composition x of As to 0.59 or less to control the conduction band discontinuity with the N-type InAlAs electron supply layer,
This is achieved by a semiconductor device characterized in that a normally-off operation is performed.

Further, in the above device, the P of the InAsP channel layer
By controlling the composition x of As with respect to 0.59 or more, the conduction band discontinuity with the N-type InAlAs electron supply layer is controlled,
This is achieved by a semiconductor device characterized by performing a normally-on operation.

Further, the object is to form an InP substrate, an undoped InAsP channel layer formed on the InP substrate, an AndOb InAlAs gate insulating layer formed on the InAsP channel layer, and an InAlAs gate insulating layer formed on the InAlAs gate insulating layer. A gate electrode, source and drain regions formed on both sides of the InAlAs gate insulating layer and the InAsP channel layer, and source and drain electrodes respectively formed on the source and drain regions. The thickness of the channel layer is smaller than the critical thickness at which dislocations occur in the crystal due to lattice mismatch, and the voltage applied to the gate electrode causes the InAs
This is achieved by a semiconductor device characterized by controlling the concentration of a two-dimensional electron gas formed in a P-channel layer.

[Operation] That is, the present invention relates to an N-type InAlAs electron supply layer or InAlAs.
By using the gate insulating layer and the InAsP layer channel layer and changing the As composition ratio x of the InAsP channel layer, N-type InAlAs
The threshold voltage V _TH is controlled by changing the conduction band discontinuity ΔE _C between the electron supply layer and the InAlAs gate insulating layer. Thus, a normally-off type FET can be realized.
Further, by increasing the electron mobility, high-speed operation can be improved.

[Examples] Hereinafter, the present invention will be specifically described based on the illustrated examples.

FIG. 1 is a sectional view of a HEMT according to a first embodiment of the present invention,
2 to 5 are graphs for explaining the HEMT of FIG.

An undoped InAs _0.48 P _0.52 channel layer 6 having a thickness of 400 、 is formed on the InP substrate 2 via an In _0.52 Al _0.48 As buffer layer 4 by, for example, MOCVD (Metal Organic Chemical Vapor).
A heterojunction is formed by crystal growth using a deposition method. On this InAs _0.48 P _0.52 channel layer 6,
N-type In with doping concentration N _D = 1.5 × 10 ¹⁸ cm ^-3 and thickness of 100 mm
_{A 0.52} Al _0.48 As electron supply layer 8 is similarly crystal-grown using the MOCVD method to form a heterojunction.

Further, on the N-type In _0.52 Al _0.48 As electron supply layer 8,
Via the n-type In _0.53 Ga _0.47 As cap layer 10, for example, AuGe
A source electrode 12 and a drain electrode 14 made of / Au are provided. The source electrode 12 and the drain electrode 14 are formed in the InAs _0.48 P _0.52 channel layer 6.
Makes ohmic contact with two-dimensional electron gas.

Further, on the N-type In _0.52 Al _0.48 As electron supply layer 8 sandwiched between the source electrode 12 and the drain electrode 14, for example,
A gate electrode 16 made of Al is provided to form a Schottky junction.

Now, the band gap of InAs _X P _1-X Eg and lattice constant a
As is clear from FIG. 2 showing the dependency of the InAs _0.48 P _0.52 channel layer 6 on the As composition ratio x,
When x = 0.48, the lattice constant a is a ≒ 5.84. This value does not match the lattice constant of an In _0.52 Al _0.48 As buffer layer 4 that is an InP substrate 2 and the lattice matching, the dependence on InAs _X P _1-X critical thickness h _C of As composition ratio x of As shown in FIG. 3, the thickness of the InAs _0.48 P _0.52 channel layer 6 is
If the angle is 450 ° or less, no dislocation due to lattice mismatch occurs.

In the first embodiment, since the thickness of the InAs _0.48 P _0.52 channel layer 6 is 400 °, no dislocation occurs due to lattice mismatch. Similarly, no dislocation occurs between the N-type In _0.52 Al _0.48 As electron supply layer 8.

In this case, as is clear from Figure 4 that shows dependence on InAs _X P _1-X As the composition ratio x of the electron transfer amount μ of, InAs
_0.48 P _0.52 The electron transfer amount μ of the channel layer 6 is μ ≒ 12000c
m ² / Vs, which is higher than the electron mobility μ ≒ 10000 cm ² / Vs of the conventional In _0.53 Ga _0.47 As channel layer.

As is clear from FIG. 2, when the As composition ratio x of the InAs _0.48 P _0.52 channel layer 6 is x = 0.48, the band gap Eg becomes Eg = 0.86 eV. Assuming that the conduction band discontinuity ΔE _C between the InAs _0.48 P _0.52 channel layer 6 and the N-type In _0.52 Al _0.48 As electron supply layer 8 is 60% of the band gap Eg, ΔE _C = 0.38 eV. This value is equal to 0.1 in comparison with ΔE _C = 0.53 eV in the case of the conventional InGaAs channel layer.
Reduced by 15 eV.

Therefore, the conventional N-type In _0.52 Al _0.48 As / In _0.53 Ga _0.47 As
FIG. 5 shows the relationship between the threshold voltage V _TH and the thickness d of the N-type In _0.52 Al _0.48 As electron supply layer in the HEMT of FIG.
_0.52 Al _0.48 As The threshold voltage V _TH of the HEMT when the thickness d of the electron supply layer 8 is d = 100 °, which is a thickness that does not increase the gate leakage current, is V _TH = 0.1 V Become. Thus it is possible to achieve a threshold voltage V _TH to perform sufficiently good normally-off operation.

Thus, according to the first embodiment, the InAs of the channel layer
By controlling the As composition ratio x and the thickness of the InAsP channel layer using P, a normally-off FET can be realized while improving the speed as compared with the conventional case.

That is, a high-quality heterojunction free from dislocations due to lattice mismatch can be formed with the N-type In _0.52 Al _0.48 As electron supply layer or the like. Further, the electron mobility μ of the InAsP channel layer can be made higher than that of the conventional In _0.53 Ga _0.47 As channel layer. Further, the thickness of the N-type In _0.52 Al _0.48 As electron supply layer can be set to a thickness that does not increase the gate leakage current. And N-type In _0.52 Al
The conduction band discontinuity ΔE _C with the _0.48 As electron supply layer 8 can be reduced, thereby obtaining a high threshold voltage V _{TH at} which a sufficiently good normally-off operation can be performed.

In the first embodiment, the As composition ratio x is set to x = 0.
Although the InAs _0.48 P _0.52 channel layer 6 of 8 was used, the composition ratio is not limited to this. However, in that case, in response to the InAs _X P _1-X of the channel layer As composition ratio x, the thickness and N-type In
_0.52 Al _0.48 As It is necessary to change and control the thickness of the electron supply layer. For example, at x = 0.5, the thickness of the InAsP channel layer is set to 410Å to ensure that no dislocations occur.
Must be: When x <0.59, the band gap Eg of the channel layer is In _0.53 Ga _0.47
Eg of the As channel layer becomes larger than 0.75 eV, and therefore N
Type In _0.52 Al _0.48 As The conduction band discontinuity ΔE _C with the electron supply layer can be reduced, and the threshold voltage V _TH can be increased, and the electron transfer of the InAsP channel layer at this time can be increased. The amount μ is μ ≒ 7000 to 14000 cm ² / Vs, which is
It is almost the same as the case of the n _0.53 Ga _0.47 As channel layer.

Next, a second embodiment of the present invention will be described with reference to FIG.
HEMT will be described.

FIG. 6 is a sectional view of a HEMT according to a second embodiment of the present invention. The same components as those of the HEMT shown in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted.

An undoped InAs _0.7 P _0.3 channel layer 1 having a thickness of 150 ° is formed on an InP substrate 2 via an In _0.52 Al _0.48 As buffer layer 4.
8 is grown by MOCVD to form a heterojunction. On the InAs _0.7 P _0.3 channel layer 18, an N-type In _0.52 having a doping concentration of N _D = 1.5 × 10 ¹⁸ cm ⁻³ and a thickness of 300 °
The Al _0.48 As electron supply layer 20 is similarly crystal-grown to form a heterojunction. On the N-type In _0.52 Al _0.48 As electron supply layer 20, a source electrode 12 and a drain electrode 14 made of AuGe / Au are provided via an n-type In _0.53 Ga _0.47 As gap layer 10. A gate electrode 16 made of Schottky contact Al is provided on the N-type In _0.52 Al _0.48 As electron supply layer 20 sandwiched between the source electrode 12 and the drain electrode 14.

Also in the second embodiment, as in the first embodiment, by controlling the As composition ratio x and the thickness of the InAs _0.7 P _0.3 channel layer 18 to be x = 0.7 and 150 °, respectively,
As is clear from FIGS. 2 and 3, dislocation due to lattice mismatch does not occur.

At this time, the electron mobility μ of the InAs _0.7 P _0.3 channel layer 18 is, as apparent from FIG. 4, μ よ う 18000 cm ² / V
s, which is almost twice as high as the electron mobility μ ≒ 10000 cm ² / Vs of the In _0.53 Ga _0.47 As channel layer of the conventional HEMT.

Then, the InAs _0.48 P _0.52 channel layer 18 and the N-type In _0.52 Al
_0.48 As the conduction band discontinuity △ E _C with the electron supply layer 20 is △ E _C =
0.52eV next, the case of the In _0.53 Ga _0.47 As channel layer of the conventional HEMT is compared is the with a △ E _C = 0.53 eV, is approximately equal. Therefore, the threshold voltage V _TH is also smaller than that of the conventional N-type In.
Threshold voltage V in HEMT of _0.52 Al _0.48 As / In _0.53 Ga _0.47 As
_This is approximately the same as _TH, and a sufficiently favorable normally-on operation can be performed.

As described above, according to the second embodiment, InAs is formed in the channel layer.
By using P to control the As composition ratio x and the thickness of the InAsP channel layer, a normally-on FET with a much higher speed than before can be realized.

That is, a high-quality heterojunction free of dislocation due to lattice mismatch can be formed between the N-type In _0.52 Al _0.48 As electron supply layer 20 and the like. Further, the electron mobility μ of the InAsP channel layer can be almost twice as high as that of the conventional In _0.53 Ga _0.47 As channel layer. And N-type In _0.52 Al
_0.48 As The conduction band discontinuity ΔE _C with the electron supply layer 20 is
_The threshold voltage _VTH for performing a sufficiently good normally-on operation can be obtained by setting the threshold voltage to approximately the same level as that of the _0.53 Ga _0.47 As channel layer.

In the second embodiment, the As composition ratio x is set to x = 0.
Although the InAs _0.48 P _0.52 channel layer 18 of 7 was used, the composition ratio is not limited to this. In order to obtain a threshold voltage V _TH for performing a good normally-on operation, the N-type In _0.52 Al
_Since it is desirable to increase the conduction band discontinuity ΔE _C with the _0.48 As electron supply layer 20, it is better to increase the As composition ratio x. However, in that case, in response to the InAs _X P _1-X of the channel layer As composition ratio x, is located in a need to change control of the thickness and the like of the thickness and N-type an In _0.52 Al _0.48 As electron supply layer above This is the same as the first embodiment.

Next, a third embodiment of the present invention will be described with reference to FIG.
IGFET is described.

FIG. 7 is a sectional view of an IGFET according to a third embodiment of the present invention, and FIG. 8 is a graph for explaining the IGFET of FIG.

The same components as those of the HEMT shown in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted.

An undoped InAs _0.51 P _0.49 channel layer 22 having a thickness of 300 ° is grown on the InP substrate 2 via an In _0.52 Al _0.48 As buffer layer 4 by MOCVD to form a heterojunction. On the InAs _0.51 P _0.49 channel layer 22, an undoped In _0.52 Al _0.48 As gate insulating layer 24 having a thickness of 300 ° is similarly crystal-grown to form a heterojunction. A gate electrode 26 made of, for example, WSi is provided on the In _0.52 Al _0.48 As gate insulating layer 24 to form a Schottky junction.

Further, using this gate electrode 26 as a mask, In _0.52 Al _0.48
Si ions are implanted to reach the As buffer layer 4,
On both sides of the InAs _0.51 P _0.49 channel layer 22 and the In _0.52 Al _0.48 As gate insulating layer 24, an n ⁺ type source region 28 and an n ⁺ type drain region 30 are formed, respectively. On these n ⁺ type source region 28 and n ⁺ drain region 30, AuGe / Au
A source electrode 32 and a drain electrode 34 are formed.

Also in the third embodiment, as in the first embodiment, the As composition ratio x = 0.51 of the InAs _0.51 P _0.49 channel layer 22 is used.
2 and 3 by controlling the thickness and the thickness of 300 mm.
As is clear from the figure, dislocation due to lattice mismatch is prevented from occurring.

The threshold voltage V _TH at this time is expressed by V _TH = ψ- △ E _C. The InAs _X P _1-X of the channel layer As composition ratio x
As apparent from FIG. 8 that shows the dependence of the threshold voltage V _TH for the threshold voltage V _TH when the InAs _0.51 P _0.49 channel layer 22 becomes V _TH = 0.2V.

Conventionally, In _0.52 Al _0.48 As / I using InGaAs for the channel layer
In an IGFET of n _0.53 Ga _0.47 As, the gate electrode and In _0.52
Al _0.48 height ψ is an In _0.52 Al _0.48 As the gate insulating layer of the gate Schottky barrier between As the gate insulating layer and an In _0.53 Ga _0.47 As
The value becomes substantially equal to the conduction band discontinuity ΔE _C with the channel layer 36, and therefore, the threshold voltage V _TH becomes V _TH ≒ 0V.
In comparison with such a conventional IGFET, in the third embodiment, the threshold voltage at which a sufficiently large noise margin can be obtained is obtained.
_VTH , and a good normally-off operation can be performed.

As described above, according to the third embodiment, in the IGFET using the undoped InAlAs layer for the gate insulating layer, the InAsP is used for the channel layer, and the As composition ratio x and the thickness of the InAsP channel layer are controlled. Thus, a normally-off type FET can be realized.

In the third embodiment, the As composition ratio x is set to x = 0.
Although the InAs _0.51 P _0.49 channel layer 22 of 51 was used, the composition ratio is not limited to this. In order to obtain good DCFL circuit, since the threshold voltage V _TH of the normally-off type FET is about 0.1V~0.2V is desired, as is clear from FIG. 8, InAs _X P
By changing the As composition ratio x of the _1-X channel layer, a desired threshold voltage _VTH can be obtained.

Thus using InAs _X P _1-X layer as a channel layer, by controlling the As composition ratio x and thickness, the first and normally-off type FET in the third embodiment
And in the second embodiment, the normally-on type
FET can be realized. Therefore, a DCFL circuit can be configured by combining these normally-off type FETs and normally-on type FETs. At this time, the speed of the carrier is increased or at least maintained at the same level as that in the case where the conventional InGaAs layer is used as the channel, so that the speed is improved or the speed is maintained. doing.

[Effects of the Invention] As described above, according to the present invention, by using an N-type InAlAs electron supply layer or an InAlAs gate insulating layer and an InAsP channel layer, and changing the As composition ratio x of P of the InAsP channel layer, The threshold voltage _VTH can be controlled by changing the conduction band discontinuity ΔE _C with the type InAlAs electron supply layer or the InAlAs gate insulating layer.

Thus, a normally-off type FET can be realized. Further, the electron mobility can be increased to improve the high speed.

[Brief description of the drawings]

FIG. 1 is a sectional view showing an HEMT according to a first embodiment of the present invention, FIGS. 2 to 5 are graphs for explaining the HEMT of FIG. 1, respectively, and FIG. 6 is a second embodiment of the present invention. FIG. 7 is a sectional view showing an HEMT according to an embodiment, FIG. 7 is a sectional view showing an IGFET according to a third embodiment of the present invention, FIG. 8 is a graph for explaining the IGFET of FIG. 7, and FIG. FIG. 3 is a cross-sectional view showing a HEMT. In the figure, 2 ... InP substrate, 4 ... In _0.52 Al _0.48 As buffer layer, 6 ... InAs _0.48 P _0.52 channel layer, 8, 38 ... N-type In _0.52 Al _0.48 As electron supply layer, 10 ... n In _0.53 Ga _0.47 As cap layer, 12, 32 ... source electrode, 14, 34 ... drain electrode, 16, 26 ... gate electrode, 18 ... InAs _0.7 P _0.3 channel layer, 20 ... N-type In _0.52 Al _0.48 As electron supply layer, 22 …… InAs _0.51 P _0.49 channel layer, 24 …… In _0.52 Al _0.48 As gate insulating layer, 28 …… n ⁺ source region, 30 …… n ⁺ drain region, 36 …… In _0.53 Ga _0.47 As channel layer.

Claims (4)

(57) [Claims] An undoped InAsP channel layer formed on the InP substrate; an N-type InAlAs electron supply layer formed on the InAsP channel layer; and an N-type InAlAs electron supply layer formed on the InP substrate. The formed source and drain electrodes, and the N-type In sandwiched between the source and drain electrodes
A gate electrode formed on the AlAs electron supply layer, wherein the thickness of the InAsP channel layer is smaller than a critical thickness at which dislocation occurs in the crystal due to lattice mismatch, and the voltage applied to the gate electrode is A semiconductor device characterized by controlling the concentration of a two-dimensional electron gas formed in an InAsP channel layer. 2. The semiconductor device according to claim 1, wherein a composition x of As with respect to P of said InAsP channel layer is set to 0.59 or less, thereby controlling a conduction band discontinuity with said N-type InAlAs electron supply layer. A normally-off operation. 3. The semiconductor device according to claim 1, wherein the composition x of As with respect to P in said InAsP channel layer is set to 0.59 or more to control the amount of conduction band discontinuity with said N-type InAlAs electron supply layer. A normally-on operation. 4. An InP substrate, an undoped InAsP channel layer formed on the InP substrate, and an AndAlB InAlA formed on the InAsP channel layer.
s gate insulating layer, a gate electrode formed on the InAlAs gate insulating layer, source and drain regions formed on both sides of the InAlAs gate insulating layer and the InAsP channel layer, and Having a source and drain electrode formed, wherein the thickness of the InAsP channel layer is smaller than a critical thickness at which dislocation occurs in the crystal due to lattice mismatch, and the voltage applied to the gate electrode causes the InAsP channel layer to A semiconductor device wherein the concentration of a two-dimensional electron gas formed therein is controlled.