JPS58147167A - High mobility complementary semiconductor device - Google Patents
High mobility complementary semiconductor deviceInfo
- Publication number
- JPS58147167A JPS58147167A JP3000482A JP3000482A JPS58147167A JP S58147167 A JPS58147167 A JP S58147167A JP 3000482 A JP3000482 A JP 3000482A JP 3000482 A JP3000482 A JP 3000482A JP S58147167 A JPS58147167 A JP S58147167A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- electron
- hole
- type
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 36
- 230000000295 complement effect Effects 0.000 title claims abstract description 23
- 239000012535 impurity Substances 0.000 claims abstract description 16
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract description 11
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 abstract description 7
- 229910052733 gallium Inorganic materials 0.000 abstract description 7
- 238000009825 accumulation Methods 0.000 abstract description 4
- 239000004047 hole gas Substances 0.000 abstract description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 2
- 229910052710 silicon Inorganic materials 0.000 abstract description 2
- 239000010703 silicon Substances 0.000 abstract description 2
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 abstract 2
- 229910052782 aluminium Inorganic materials 0.000 abstract 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract 2
- JBQYATWDVHIOAR-UHFFFAOYSA-N tellanylidenegermanium Chemical compound [Te]=[Ge] JBQYATWDVHIOAR-UHFFFAOYSA-N 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 51
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 11
- 239000010931 gold Substances 0.000 description 9
- 230000005533 two-dimensional electron gas Effects 0.000 description 6
- FTWRSWRBSVXQPI-UHFFFAOYSA-N alumanylidynearsane;gallanylidynearsane Chemical compound [As]#[Al].[As]#[Ga] FTWRSWRBSVXQPI-UHFFFAOYSA-N 0.000 description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 3
- 239000011701 zinc Substances 0.000 description 3
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 2
- BYDQGSVXQDOSJJ-UHFFFAOYSA-N [Ge].[Au] Chemical compound [Ge].[Au] BYDQGSVXQDOSJJ-UHFFFAOYSA-N 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 229910052725 zinc Inorganic materials 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 229910018885 Pt—Au Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 229910052783 alkali metal Inorganic materials 0.000 description 1
- 150000001340 alkali metals Chemical class 0.000 description 1
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- ODTJADXKPVVECM-UHFFFAOYSA-N gold nickel zinc Chemical compound [Ni][Zn][Au] ODTJADXKPVVECM-UHFFFAOYSA-N 0.000 description 1
- 125000005842 heteroatom Chemical group 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 230000027756 respiratory electron transport chain Effects 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
- H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0605—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits made of compound material, e.g. AIIIBV
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
Description
【発明の詳細な説明】
（１１発明の技術分野
本発明は、高電子移動変トランジスタと高ホール移＠度
トランジスタとをもって構成される相補型半導体装置に
関する。DETAILED DESCRIPTION OF THE INVENTION (11) Technical Field of the Invention The present invention relates to a complementary semiconductor device comprising a high electron mobility variable transistor and a high hole mobility transistor.
（２）技術の背景
相補型半導体装置とは、互に逆の極性を有する２個のト
ランジスタが接続されてなり−・っの機能を有する半導
体装置をいい、低電力、高速に動作しうる論理回路を構
成しうる特徴を有する。その代表的な例はＰＮＰ型トラ
ンジスタとＮＰＮ型Ｆランジスタとよりなるインノ々−
夕である。(2) Background of the technology A complementary semiconductor device is a semiconductor device that has two transistors with opposite polarities connected to each other, and has the following functions. It is a logic device that can operate at low power and high speed. It has the feature of being able to form a circuit. A typical example is an innovative transistor consisting of a PNP transistor and an NPN F transistor.
It is evening.
一方、高電子移動度トランジスタとは、砒化ガリニウム
（ＧａＡｓ）とアルミニュウムガリュウム砒素（Ａ／Ｇ
ａＡｓ）等電子親和力の相異なる二種の半導体を接合す
ることにより形成される一つのへテロ接合面の近傍に蓄
積される電子群（二次元電子ガス）の電子面＃度を制御
電極によって制御して、この制衡電極を挾ん↑設けられ
た一対の入・出力ｉｉ極間に上記の蓄積電子群（二次元
電子ガス）をもって形成される導電路のインピーダンス
を匍ｊ御するｔＩ＠動的半導体装置をいう。On the other hand, high electron mobility transistors are made of gallium arsenide (GaAs) and aluminum gallium arsenide (A/G
aAs) Controlling the electron surface density of a group of electrons (two-dimensional electron gas) accumulated near a single heterojunction surface formed by joining two types of semiconductors with different isoelectronic affinities using a control electrode. Then, the impedance of the conductive path formed by the above-mentioned accumulated electron group (two-dimensional electron gas) is controlled between a pair of input and output electrodes provided by sandwiching this control electrode. Refers to semiconductor devices.
高電子移動ｖトランジスタを構成しつる半導体の組み合
わせとなりつる半導体の条件は、（イ）互に格子定数が
同一であるか近似していること、（ロ）電子親和力の差
が大きいこと、ｅ→ノ々ンドギャップの差が大券いこと
であるから、上記した一例以外にも多数存在する。The conditions for a combination of vine semiconductors constituting a high electron mobility v-transistor are (a) their lattice constants are the same or similar, (b) there is a large difference in electron affinity, and e→ Since the difference in the gap is a big deal, there are many examples other than the one mentioned above.
又、電子親和力の大きな半導体よ１）なる層を上層にし
ても下層にしても、それぞれ、特有の条件を充足するか
ぎり高電子移動度トランジスタの製造は可能である。Further, it is possible to manufacture a high electron mobility transistor whether the semiconductor layer 1) having a high electron affinity is used as an upper layer or a lower layer, as long as specific conditions are satisfied.
更に、ノーマリオン型も、ノーマリオフ型も、それぞれ
、特有の要件を充足すれば、製造可能である。Furthermore, both normally-on type and normally-off type can be manufactured if their respective specific requirements are satisfied.
高電子移動度トランジスタの特徴は、上記の蓄積電子群
（二次元電子ガス）の電子移動度が特に７７°に以下の
低温において非常に大永くなることマあるから、これを
使用して相補型回路を構成することができれば、両者の
利点を事ねて活用することができ、甚だ有利〒ある。The characteristic of high electron mobility transistors is that the electron mobility of the above-mentioned stored electron group (two-dimensional electron gas) becomes extremely long, especially at low temperatures below 77 degrees, so it is possible to use complementary If you can construct a circuit, you can take advantage of the advantages of both, which is extremely advantageous.
（３） 従来技術と問題点
ところが、従来技術においては、ｎ型４電媒体〒ある電
子を４電媒体とする高電子移動度トランジスタは）２造
可能マあるが、ｐ型４電媒体を有する高移動度トランジ
スタは発明されてぃながったから、高移動度相補型半導
体装置は製造困＃フあった。そこでｐ型導竜媒体を有す
る昼移動度トランジスタの発明を完成して、高移動度相
補型半導体装置の発明を構成することが望まれていた。(3) Conventional technology and problems However, in the conventional technology, it is possible to make two n-type 4-carrier transistors (a high electron mobility transistor with a certain electron as 4-carriers), but it is possible to make two transistors with p-type 4-carriers. Since high-mobility transistors had not yet been invented, high-mobility complementary semiconductor devices were difficult to manufacture. Therefore, it has been desired to complete the invention of a diurnal mobility transistor having a p-type doryogen medium and to constitute the invention of a high mobility complementary semiconductor device.
（４）発明の目的
本発明の目的は、このＪＮ精にこたえるもの〒あり、ｎ
型導電媒体である電子を導電媒体とする高電子移動度ト
ランジスタとｐ型導電媒体を有する高移動度トランジス
タとを組み合わせてなる高移動度相補型半導体装置を提
供することにある。(4) Purpose of the Invention The purpose of the present invention is to meet the needs of JN.
An object of the present invention is to provide a high-mobility complementary semiconductor device formed by combining a high-electron mobility transistor using electrons as a conductive medium and a high-mobility transistor having a p-type conductive medium.
（５） 発明の構成
本発明に係る高移動度相補型半導体装置の構成は、同一
の基板上に形成された高電子移動度トランジスタとｐ型
導電媒体ｆあるホールを導電媒体とする高ホール移動度
トランジスタとをもって相補型半導体装置を構成するこ
とを基本概念とし、０）絶縁性またはＭＰＩ／ｌ！縁性
の半導体基板上に形成されており、ノンドープで不純物
を実質的に含有しておらない、砒化ガリ凰つム（ＧａＡ
ｓ）等の電子親和力の大きな半導体よりなる層（チャン
ネル層）を有し、このチャンネル層はその上面に溝が形
成されており、この溝によってチャンネル層の上部は区
画されており、（ロ）このチャンネル層の一区画上に形
成されており、ｎ型の不純物を含有している、アルミニ
ュウムガリ凰つム砒素（ム／ＧａＡａ）尋の電子親和力
の小さな半導体よりなる層（電子供給層）と、この電子
供給層上の一部領域、一般にはほぼ中央領域に、設けら
れたｎ型制御電極と、このｎ型制御ｉｔｅ＞を挾んで、
上記の電子供給層上に設けられたｎ型入・出方ｌｌＩ＆
とを有する、ノーマリオフモードの高電子移動度トラン
ジスタを有し、Ｈ上記のチャンネル層の他の一区画上に
形成されており、ｐ型の不純物を含有している、アルミ
ニ瓢ウムガリ為ウム砒素（Ａ／ＧａＡｓ）勢の電子親和
力の小さな半導体よりなる層（ホール供給層）と、この
ホール供給層上の一部の領域、一般にはほぼ中央領域に
、設けられたｐ型制御電極と、このｐ型制御電極を挾ん
〒、上記のホール供給層上に設けられたｐ型入・出カ′
ｌｌ極とを有する、ノーマリオフモードの高ホール移動
度トランジスタを有し、に）上記の高電子移動度トラン
ジスタと高ホール移動度トランジスタとの制御電極は相
互に接続されて、相補型半導体装置の入カ′＠極を構成
し、また、上記二種の高移動度トランジスタの出方電極
は相互に接続されて、相補型半導体装置の出方電極を構
成し、さらに、上記二種の高移動度トランジスタの入・
出カ゛題極は相補型半導体装置の電源電極を構成するこ
とにある。(5) Structure of the Invention The structure of the high-mobility complementary semiconductor device according to the present invention includes a high-electron-mobility transistor formed on the same substrate and a p-type conductive medium. The basic concept is to configure a complementary semiconductor device with 0) insulation or MPI/l! It is formed on a non-doped semiconductor substrate, and is a non-doped and substantially free of impurities.
It has a layer (channel layer) made of a semiconductor with high electron affinity such as s), and this channel layer has a groove formed on its upper surface, and the upper part of the channel layer is divided by this groove, and (b) A layer (electron supply layer) formed on one section of this channel layer and made of a semiconductor having a low electron affinity such as aluminum gallium arsenic (GaAa) and containing n-type impurities. , sandwiching the n-type control electrode provided in a partial region, generally approximately the central region, on the electron supply layer, and the n-type control electrode,
n-type input/output type provided on the above electron supply layer llI&
A normally-off mode high electron mobility transistor is formed on another section of the above channel layer, and contains an aluminum gallium arsenide containing p-type impurity. A/GaAs) layer (hole supply layer) made of a semiconductor with low electron affinity, a p-type control electrode provided in a part of the hole supply layer, generally approximately in the central region, and this p-type control electrode. The p-type input/output electrodes placed on the hole supply layer sandwich the type control electrodes.
and (b) control electrodes of the high electron mobility transistor and the high hole mobility transistor are connected to each other to form an input of the complementary semiconductor device. The output electrodes of the two types of high mobility transistors are connected to each other to configure the output electrodes of the complementary semiconductor device, and the output electrodes of the two types of high mobility transistors are Transistor input/
The challenge lies in constructing a power supply electrode for a complementary semiconductor device.
本発明の完成を可能にしたものは、基板とチャンネル層
とを高電子移動度トランジスタと共通にする高ホール移
動度トランジスタである。この高ホール移動１トランジ
スタの原理は、高電子移動度トランジスタのそれと類似
したもの！あるが、第１図に示すように、ｐｍの不純物
を含有する電子親和力の小さな半導体例えばアルき二凰
つムガリエウム砒素（ム／ＧａＡｓ）と不純物を含有し
ない電子親和力の大きな半導体例えば砒化ガ１７ ＫＬ
ウム（ＧａＡｓ）とのへテロ界面には、荷電子帯と禁制
帯との界面にポテンシャルウェルが存在し、このポテン
シャルウェル□に蓄積されるホール群■を導電媒体とし
て利用して、高電子移動度トランジスタの場合と同様、
高ホール移動度トランジスタの実現を可能とすることで
ある。ここで、ホールの移動胚と電子の移動度とを正確
に一致するように制御することは容具ではないが、高電
子移動度トランジスタと高ホール移動度トランジスタと
に対しチャンネル層は共通にしても、電子供給層・ホー
ル供給層の層厚、不純物濃度を制御する等の手段により
、それらのしきい値電圧が適当に接近した値となるよう
に制御することは可能〒あり、良好な相補型口路、例え
ばイン・々−夕として動作することが確関されている。What has made it possible to complete the invention is a high hole mobility transistor that shares a substrate and a channel layer with a high electron mobility transistor. The principle of this high hole mobility 1 transistor is similar to that of a high electron mobility transistor! However, as shown in Fig. 1, a semiconductor with a small electron affinity that contains pm impurities, such as alkali metal arsenide (GaAs), and a semiconductor with a high electron affinity that does not contain impurities, such as arsenide 17 KL
At the heterointerface with GaAs, there is a potential well at the interface between the valence band and the forbidden band, and the hole group □ accumulated in this potential well □ is used as a conductive medium to achieve high electron transfer. As in the case of degree transistors,
The object is to enable the realization of a high hole mobility transistor. Although it is not possible to control the hole mobility to exactly match the electron mobility, the channel layer is common to high electron mobility transistors and high hole mobility transistors. However, by controlling the layer thickness and impurity concentration of the electron supply layer and hole supply layer, it is possible to control their threshold voltages to values that are appropriately close to each other, and it is possible to achieve good complementarity. It is certain that the system will operate as a type port, e.g.
（５）発明の実施例
以下図面を参照しつつ、本発明の一実施例に係る、砒化
ガリュウム（ＧａＡｓ）をチャンネル層とし、アルミニ
ュウムガリュウム砒素（Ａ／ＧａＡｓ）を電子供給層・
ホール供給層とする、相補型半導体装置について説明し
、その構成と特有の効果とを更に明らかにする。(5) Embodiments of the Invention Referring to the drawings, an embodiment of the present invention will be described in which gallium arsenide (GaAs) is used as a channel layer, aluminum gallium arsenide (A/GaAs) is used as an electron supply layer,
A complementary semiconductor device that serves as a hole supply layer will be explained, and its structure and unique effects will be further clarified.
第２図は、上記の相補型半導体装置の概念的断面図１あ
る。図において１はクローム（Ｏｒ）等ヲ含有する半絶
縁性砒化ガＩＪ ａラム（ＧａＡｓ）基板であり、２は
不純物を含有しない砒化ガＩＪ ＆ラム（ＧａＡｓ）よ
りなるノ々ツファ一層↑あり、その機能は周知のとおり
、結晶整合の改善にあり、本発明の必須構成要素には含
まれない。３は不純物を含有しない砒化ガリュウム（Ｇ
ａＡｓ）よりなるチャンネル層〒あり、＃＄４をもりて
各トランジスタ毎に区画されている。低温状態において
はチャンネル層そのものは絶縁物となるの１各トランジ
スタは相互に？縁される。５はシリコン（８１）醇ｎ型
の不純物を含有するアル建二エウムガリエウム砒素（ム
ｚＧａａｓ）よりなる電子供給層であり、６は亜鉛（Ｚ
ｎ）等ｐ型の不純物を含有するアルミニ凰ウムガリュウ
ム砒素（Ａ／ＧａＡｓ）よりなるホール供給層である。FIG. 2 is a conceptual sectional view 1 of the above complementary semiconductor device. In the figure, 1 is a semi-insulating arsenide gallium IJ aram (GaAs) substrate containing chromium (Or), etc., and 2 is a notch layer ↑ made of arsenide gallium IJ & ram (GaAs) that does not contain impurities. As is well known, its function is to improve crystal matching and is not included as an essential component of the present invention. 3 is gallium arsenide (G
There is a channel layer made of aAs), which is divided for each transistor by #$4. In low-temperature conditions, the channel layer itself becomes an insulator.1 Does each transistor interact with each other? be connected. 5 is an electron supply layer made of aluminum gallium arsenide (Gaas) containing n-type impurities in silicon (81), and 6 is zinc (Z).
n) A hole supply layer made of aluminum gallium arsenide (A/GaAs) containing p-type impurities.
７はｎｆｉの不純物を含有する砒化ガＩＪ ｓ−ラム（
ｃｉａＡｓ）よりなる補助層〒あり、チャンネル層３と
電子供給層５とのへテロ界面近傍に二次元電子ガス８が
蓄積することを促進するための補助的機能を有する。７
′はｐ型の砒化ガリーウム（ＧａＡｓ）よりなる補助層
であり、チャンネル層３とホール供給層６との界面近傍
に二次元ホールガス９が蓄積することを促進するための
補助的機能を有する。両トランジスタがノーマリオフ特
性を有するためには、制御電極１０ 、１１直下の領塚
では電子・ホール供給層５．６とチャンネル層３とのへ
テロ界面近傍には熱平衡状ｎ″Ｔ！二次元電子ガス又は
二次元ホールガス８，９が存在していないことが必須で
ある。１０と１１とは、それぞれｎ型とｐ型との制御電
極〒あり、チタン、白金、金（Ｔ１・Ｐｔ−Ａｕ ）の
三重層よりなるショットキノ々リヤ型ゲート電＆フあり
、相互に接続されて、相補型半導体装置の入力電極ＩＮ
を構成する。１２と１４とは、それぞれ、ｎ型とｐ型と
の入力を極であ【）、夫々金ゲルマニ具つム・金（Ａｕ
−Ｇｅ／Ａｕ）の二重層と亜鉛・ニッケル・金（ｚｎ／
Ｎ１／Ａｕ ）の三重層よりなるオーミック電極であり
相補型半導体装置の電源電極＋−を構成する。１３と１
５とは、それぞれ、ｎ型とｐ型との出力電極であり、夫
々金ゲルマニエウム・金（ムｕ、 Ｇｅ／Ａｕ ）の二
重層と亜鉛・ニッケル・金（Ｚｎ ／Ｎｉ ／Ａｕ ）
の三重層よりなるオーミック電極〒あり、相互に接続さ
れて相補型半導体装置の出力電極ＯＵＴを構成する。7 is arsenic moth IJ s-lam containing NFI impurities (
There is an auxiliary layer made of ciaAs), which has an auxiliary function to promote accumulation of two-dimensional electron gas 8 near the hetero interface between channel layer 3 and electron supply layer 5. 7
' is an auxiliary layer made of p-type gallium arsenide (GaAs), which has an auxiliary function to promote accumulation of two-dimensional hole gas 9 near the interface between channel layer 3 and hole supply layer 6. In order for both transistors to have normally-off characteristics, a thermally balanced n″T! two-dimensional electron gas exists near the heterointerface between the electron/hole supply layer 5.6 and the channel layer 3 in the region directly below the control electrodes 10 and 11. Alternatively, it is essential that the two-dimensional hole gases 8 and 9 do not exist.10 and 11 are n-type and p-type control electrodes, respectively, and are titanium, platinum, and gold (T1・Pt-Au). There is a Schottky-type gate electrode made up of three layers of
Configure. 12 and 14 are the input poles of n-type and p-type, respectively, and are gold germanium material and gold (Au).
-Ge/Au) double layer and zinc-nickel-gold (zn/
It is an ohmic electrode made of a triple layer of N1/Au) and constitutes a power supply electrode +- of a complementary semiconductor device. 13 and 1
5 are n-type and p-type output electrodes, respectively, which are made of a double layer of gold germanium/gold (Ge/Au) and zinc/nickel/gold (Zn/Ni/Au).
There are three ohmic electrodes consisting of three layers, which are connected to each other to constitute the output electrode OUT of the complementary semiconductor device.
本発明の一実施例に係る相補型半導体装置の製造方法に
おいて、電子供給層５とホール供給層６との厚さは必ず
しも同一でありうるとはかぎらない。また、これらが含
有する不純物は異なるから、高電子移動度トランジスタ
の平溝体層３，５．７と高ホール移ｗＪ度トランジスタ
の平溝体層あとな同一工程１製造できるとはかぎらない
。In the method for manufacturing a complementary semiconductor device according to an embodiment of the present invention, the thicknesses of the electron supply layer 5 and the hole supply layer 6 may not necessarily be the same. Further, since the impurities contained in these are different, it is not always possible to manufacture the flat trench layers 3, 5.7 of the high electron mobility transistor and the flat trench layer of the high hole mobility wJ degree transistor in the same process.
（６）発明の詳細
な説明せるとおり、本発明によれば、ｎ型導電媒体であ
る電子を導電媒体とする高電子移動度トランジスタとｐ
型溝１に媒体を有する高移動度トランジスタとが開−の
基板上に形成されてなる高移動度相補型半導体装置を提
供することが〒きる。(6) As described in detail, the present invention provides a high electron mobility transistor using electrons as an n-type conductive medium and a p-type conductive medium.
It is possible to provide a high mobility complementary semiconductor device in which a high mobility transistor having a medium in the mold groove 1 is formed on an open substrate.
第１図は高ホール移動度トランジスタの動作原理を説明
するだめのノ々ンドダイヤグラム？する。
第２図は本発明の一実施例に係る高移動度相補型半導体
装置の概念的断面図１ある。
■・・・ポテンシャルウェルに蓄積されるホール群、１
・・・半絶縁性基板、２・・・、２ノフア一層、３・・
・チャンネル層、４・・・溝、５・・・電子供給層、６
・・・ホ、−ル供給層、７・・・補助層、８・・・二次
元電子ガス、９・・・二次元ホールガス、１０・・・ｎ
型制御ｌｌ１ｔ極、１１・・・ｐ１Ｍ制＠電極、１２・
・・ｎ型入力電極、１３・・・ｎ型出力電極、１４・・
・ｐ型入内電極、１５・・・ｐ型出力電％、ＩＮ・・・
相補型平溝体装置の入力電極、０ｔＴＴ・・・相補型半
導体装管の出力１１！極。Is Figure 1 a random diagram explaining the operating principle of a high hole mobility transistor? do. FIG. 2 is a conceptual cross-sectional view 1 of a high mobility complementary semiconductor device according to an embodiment of the present invention. ■・・・Hole group accumulated in potential well, 1
・・・Semi-insulating substrate, 2..., 2 nofa single layer, 3...
・Channel layer, 4... Groove, 5... Electron supply layer, 6
... Hole, -hole supply layer, 7... Auxiliary layer, 8... Two-dimensional electron gas, 9... Two-dimensional hole gas, 10... n
Type control ll1t pole, 11...p1M system @electrode, 12.
... n-type input electrode, 13... n-type output electrode, 14...
・P-type input inner electrode, 15...p-type output power%, IN...
Input electrode of complementary flat groove device, 0tTT... Output 11 of complementary semiconductor device! very.
Claims (1)
導体よりなる層（チャンネル層）を有し、（ロ）核チャ
ンネル層の一区画上に形成されｎ型不純物を含有し、前
記チャンネル層より小さな電子親和力を有する半導体よ
りなる層（電子供給層）と、該電子供給層上の一部領域
に設けられた制御電極と、該制御電極を挾んで前記電子
供給層上に設けられた入・出力電極とを有するノーマリ
オフモード高電子移動度トランジスタを有し、（ハ）前
記チャンネル層の他の区画上に形成されｐ型不純物を含
有し、前記チャンネル層より小さな電子親和力を有する
半導体よりなる層（ホール供給層）と、該ホール供給層
上の一部＠塚に設けられた制御電極と、該制御電極を挾
んマ前記ホール供給層上に設けられた入・出力電極とを
有するノーマリオフモード高ホール移動度トランジスタ
を有し、に）前記二種の高移動度トランジスタの制御電
極は相互に接続されて入力電極を形成し、前記二種の高
移動度トランジスタの出力電極は相互に接続されて出力
電極を構成し、前記二種の高移動度トランジスタの入力
電極は′Ｉ！１．源電極を横電極てなる、高移動度相補
型半導体装置。(a) It has a layer (channel layer) made of a non-doped semiconductor formed on a semi-insulating semiconductor substrate, and (b) It is formed on a section of the nuclear channel layer and contains n-type impurities, and A layer made of a semiconductor having a small electron affinity (electron supply layer), a control electrode provided in a partial area on the electron supply layer, and an input layer provided on the electron supply layer with the control electrode in between. (c) a layer formed on another section of the channel layer, containing a p-type impurity, and made of a semiconductor having a smaller electron affinity than the channel layer; (a hole supply layer), a control electrode provided on a part of the hole supply layer, and input/output electrodes provided on the hole supply layer sandwiching the control electrode. a high hole mobility transistor; and a) control electrodes of the two high mobility transistors are connected to each other to form an input electrode, and output electrodes of the two high mobility transistors are connected to each other. constitutes an output electrode, and the input electrodes of the two types of high mobility transistors constitute 'I!'. 1. A high-mobility complementary semiconductor device in which the source electrode is a horizontal electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3000482A JPS58147167A (en) | 1982-02-26 | 1982-02-26 | High mobility complementary semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3000482A JPS58147167A (en) | 1982-02-26 | 1982-02-26 | High mobility complementary semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58147167A true JPS58147167A (en) | 1983-09-01 |
Family
ID=12291744
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3000482A Pending JPS58147167A (en) | 1982-02-26 | 1982-02-26 | High mobility complementary semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58147167A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2566185A1 (en) * | 1984-06-15 | 1985-12-20 | American Telephone & Telegraph | Complementary logic structure |
| JPS62245682A (en) * | 1986-04-16 | 1987-10-26 | フィリップス エレクトロニクス ネムローゼ フェンノートシャップ | High mobility semiconductor device |
| US4732870A (en) * | 1984-06-18 | 1988-03-22 | Fujitsu Limited | Method of making complementary field effect transistors |
| US4805005A (en) * | 1984-10-03 | 1989-02-14 | Hitachi, Ltd. | Semiconductor device and manufacturing method of the same |
| US4814851A (en) * | 1985-06-21 | 1989-03-21 | Honeywell Inc. | High transconductance complementary (Al,Ga)As/gas heterostructure insulated gate field-effect transistor |
-
1982
- 1982-02-26 JP JP3000482A patent/JPS58147167A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2566185A1 (en) * | 1984-06-15 | 1985-12-20 | American Telephone & Telegraph | Complementary logic structure |
| JPS6110266A (en) * | 1984-06-15 | 1986-01-17 | エイ・ティ・アンド・ティ・コーポレーション | Supplementary logic structure |
| US4732870A (en) * | 1984-06-18 | 1988-03-22 | Fujitsu Limited | Method of making complementary field effect transistors |
| US4805005A (en) * | 1984-10-03 | 1989-02-14 | Hitachi, Ltd. | Semiconductor device and manufacturing method of the same |
| US4814851A (en) * | 1985-06-21 | 1989-03-21 | Honeywell Inc. | High transconductance complementary (Al,Ga)As/gas heterostructure insulated gate field-effect transistor |
| JPS62245682A (en) * | 1986-04-16 | 1987-10-26 | フィリップス エレクトロニクス ネムローゼ フェンノートシャップ | High mobility semiconductor device |
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