JPS6316724U - - Google Patents
Info
- Publication number
- JPS6316724U JPS6316724U JP11027886U JP11027886U JPS6316724U JP S6316724 U JPS6316724 U JP S6316724U JP 11027886 U JP11027886 U JP 11027886U JP 11027886 U JP11027886 U JP 11027886U JP S6316724 U JPS6316724 U JP S6316724U
- Authority
- JP
- Japan
- Prior art keywords
- input
- frequency divider
- input signal
- counter
- programmable counter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000001360 synchronised effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 1
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Electric Clocks (AREA)
Description
第１図は本考案に係るプログラマブルカウンタ
の一実施例を示す構成ブロツク図、第２図、第３
図は動作を説明するためのタイムチヤート、第４
図、第５図は従来例を示す構成ブロツク図である
。
６……ゲート回路、１０……Ｎ検出手段、１１
……設定手段、１２〜１５……Ｄ型フリツプフロ
ツプ。
FIG. 1 is a configuration block diagram showing one embodiment of a programmable counter according to the present invention, FIGS.
The figure is a time chart to explain the operation, part 4.
5 are block diagrams showing a conventional example. 6... Gate circuit, 10... N detection means, 11
. . . Setting means, 12 to 15 . . . D-type flip-flop.
Claims (1)
ブルカウンタにおいて、入力信号が入力される分
周器とこの分周器の出力が入力される同期式カウ
ンタとを有することを特長とするプログラマブル
カウンタ。 A programmable counter that divides an input signal at a predetermined frequency division ratio, the programmable counter comprising a frequency divider to which the input signal is input and a synchronous counter to which the output of the frequency divider is input.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11027886U JPS6316724U (en) | 1986-07-18 | 1986-07-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11027886U JPS6316724U (en) | 1986-07-18 | 1986-07-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6316724U true JPS6316724U (en) | 1988-02-03 |
Family
ID=30989151
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11027886U Pending JPS6316724U (en) | 1986-07-18 | 1986-07-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6316724U (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54151369A (en) * | 1978-05-19 | 1979-11-28 | Mitsubishi Electric Corp | Programmable counter |
| JPS5636833A (en) * | 1979-09-03 | 1981-04-10 | Matsushita Electric Works Ltd | Arc distinguishing device for wiring breaker |
| JPS57150228A (en) * | 1981-03-12 | 1982-09-17 | Nec Corp | Programmable counter circuit |
-
1986
- 1986-07-18 JP JP11027886U patent/JPS6316724U/ja active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54151369A (en) * | 1978-05-19 | 1979-11-28 | Mitsubishi Electric Corp | Programmable counter |
| JPS5636833A (en) * | 1979-09-03 | 1981-04-10 | Matsushita Electric Works Ltd | Arc distinguishing device for wiring breaker |
| JPS57150228A (en) * | 1981-03-12 | 1982-09-17 | Nec Corp | Programmable counter circuit |
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