JPS63159872U - - Google Patents
Info
- Publication number
- JPS63159872U JPS63159872U JP5167987U JP5167987U JPS63159872U JP S63159872 U JPS63159872 U JP S63159872U JP 5167987 U JP5167987 U JP 5167987U JP 5167987 U JP5167987 U JP 5167987U JP S63159872 U JPS63159872 U JP S63159872U
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- printed circuit
- copper foil
- foil pattern
- inspecting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000004907 flux Effects 0.000 claims description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- 239000011889 copper foil Substances 0.000 claims description 4
- 229910000679 solder Inorganic materials 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
Description
第１図乃至第３図は、この考案に係るプリント
基板の実施例を示し、第１図は、プリント基板の
斜視図、第２図はピンボード式テスタでプリント
板ブロツクに付着したフラツクスの残〓量を検査
しているところを説明する側面図、第３図はこの
考案による他の実施例である。第４図は、従来の
実施例によるプリント基板のフラツクスの残〓量
を示す図であり、第５図はピンボード式のテスタ
で従来のプリント板ブロツクの性能を検査してい
るところを説明する断面図である。
１：プリント基板、２：銅箔パターン面、３，
４：ランド部分、５：接続部分、６：回路接続用
パターン、７：ソルダーレジスト、８：電気部品
、９：リード線、１０：プリント板ブロツク、１
１：半田、１２：フラツクス、１３：ピンボード
式テスタ、１４，１５：接触ピン、１６：割取り
部、１７：割取り用ミシン目。
Figures 1 to 3 show an embodiment of the printed circuit board according to this invention. Figure 1 is a perspective view of the printed circuit board, and Figure 2 is a pinboard type tester used to detect flux residue attached to the printed circuit board block. Figure 3, a side view illustrating the amount being inspected, is another embodiment of this invention. Figure 4 is a diagram showing the amount of flux remaining on a printed circuit board according to a conventional example, and Figure 5 explains how the performance of a conventional printed circuit board block is tested using a pinboard type tester. FIG. 1: Printed circuit board, 2: Copper foil pattern surface, 3,
4: Land portion, 5: Connection portion, 6: Circuit connection pattern, 7: Solder resist, 8: Electrical component, 9: Lead wire, 10: Printed board block, 1
1: solder, 12: flux, 13: pin board tester, 14, 15: contact pins, 16: split portion, 17: perforation for split.
Claims (1)
回路接続用の銅箔パターンのない部分に、少なく
とも２つのランド部分と、この少なくとも２つの
ランド部分を接続する接続部分とで構成されるフ
ラツクスの残〓量を検査するための銅箔パターン
を設けたことを特徴とするプリント基板。 (2) フラツクスの残〓量を検査するための銅箔
パターンを、プリント基板に形成した割取り部分
に設けたことを特徴とする実用新案登録請求の範
囲第１項記載のプリント基板。[Scope of utility model registration claims] (1) On the solder dip surface of the printed circuit board,
A copper foil pattern for inspecting the residual amount of flux consisting of at least two land portions and a connection portion connecting the at least two land portions is provided in a portion where there is no copper foil pattern for circuit connection. A printed circuit board characterized by: (2) The printed circuit board according to claim 1 of the utility model registration, characterized in that a copper foil pattern for inspecting the amount of residual flux is provided in a cut-out portion formed on the printed circuit board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5167987U JPS63159872U (en) | 1987-04-07 | 1987-04-07 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5167987U JPS63159872U (en) | 1987-04-07 | 1987-04-07 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63159872U true JPS63159872U (en) | 1988-10-19 |
Family
ID=30876168
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5167987U Pending JPS63159872U (en) | 1987-04-07 | 1987-04-07 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63159872U (en) |
-
1987
- 1987-04-07 JP JP5167987U patent/JPS63159872U/ja active Pending
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