JPS6315612B2 - - Google Patents
Info
- Publication number
- JPS6315612B2 JPS6315612B2 JP54149765A JP14976579A JPS6315612B2 JP S6315612 B2 JPS6315612 B2 JP S6315612B2 JP 54149765 A JP54149765 A JP 54149765A JP 14976579 A JP14976579 A JP 14976579A JP S6315612 B2 JPS6315612 B2 JP S6315612B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor memory
- battery
- microcomputer
- information
- margins
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims description 22
- 238000001514 detection method Methods 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 1
- 238000007781 pre-processing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/78—Apparatus for connecting with wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14976579A JPS5672786A (en) | 1979-11-19 | 1979-11-19 | Printer control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14976579A JPS5672786A (en) | 1979-11-19 | 1979-11-19 | Printer control circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5672786A JPS5672786A (en) | 1981-06-17 |
| JPS6315612B2 true JPS6315612B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1988-04-05 |
Family
ID=15482239
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14976579A Granted JPS5672786A (en) | 1979-11-19 | 1979-11-19 | Printer control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5672786A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58127226A (ja) * | 1981-12-19 | 1983-07-29 | Fujitsu Ltd | メモリ装置のクリア方法 |
-
1979
- 1979-11-19 JP JP14976579A patent/JPS5672786A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5672786A (en) | 1981-06-17 |