JPS5672786A - Printer control circuit - Google Patents

Printer control circuit

Info

Publication number
JPS5672786A
JPS5672786A JP14976579A JP14976579A JPS5672786A JP S5672786 A JPS5672786 A JP S5672786A JP 14976579 A JP14976579 A JP 14976579A JP 14976579 A JP14976579 A JP 14976579A JP S5672786 A JPS5672786 A JP S5672786A
Authority
JP
Japan
Prior art keywords
battery
terminal
pin
cleared
connector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14976579A
Other languages
Japanese (ja)
Other versions
JPS6315612B2 (en
Inventor
Tetsuo Hirota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP14976579A priority Critical patent/JPS5672786A/en
Publication of JPS5672786A publication Critical patent/JPS5672786A/en
Publication of JPS6315612B2 publication Critical patent/JPS6315612B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/78Apparatus for connecting with wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78Apparatus for connecting with wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)

Abstract

PURPOSE: To determine automatically whether position information on the tab margin is cleared or not, by providing a means of detecting whether a battery is connected to a semiconductor memory stored with tab margin position information.
CONSTITUTION: The electric power is supplied to terminal Vcc of RAM1 and electric current flows from power source +5 to terminal Vcc via diode D1 and another current also flows from battery B to terminal Vcc via diode D2. In this case, connector 4 has three-pin structure and the 3rd pin is connected to the signal line for detecting whether battery B is connected or not. If battery B is connected, its battery detection signal is held at the groud level via the 3rd pin of connector 4. When battery B is not connected, on the other hand, the battery detection signal is held at +5. Thus, the signal showing the connection or disconnection of the battery is detected by detecting circuit 2 and during electric power feed, the detection result is stored in micro computer μCPU, so that whether data in the memory area should be cleared or not can be determined.
COPYRIGHT: (C)1981,JPO&Japio
JP14976579A 1979-11-19 1979-11-19 Printer control circuit Granted JPS5672786A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14976579A JPS5672786A (en) 1979-11-19 1979-11-19 Printer control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14976579A JPS5672786A (en) 1979-11-19 1979-11-19 Printer control circuit

Publications (2)

Publication Number Publication Date
JPS5672786A true JPS5672786A (en) 1981-06-17
JPS6315612B2 JPS6315612B2 (en) 1988-04-05

Family

ID=15482239

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14976579A Granted JPS5672786A (en) 1979-11-19 1979-11-19 Printer control circuit

Country Status (1)

Country Link
JP (1) JPS5672786A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58127226A (en) * 1981-12-19 1983-07-29 Fujitsu Ltd Clearing method for memory device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58127226A (en) * 1981-12-19 1983-07-29 Fujitsu Ltd Clearing method for memory device

Also Published As

Publication number Publication date
JPS6315612B2 (en) 1988-04-05

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