JPS63155692A - 多層プリント配線板及びその製造方法 - Google Patents

多層プリント配線板及びその製造方法

Info

Publication number
JPS63155692A
JPS63155692A JP61302987A JP30298786A JPS63155692A JP S63155692 A JPS63155692 A JP S63155692A JP 61302987 A JP61302987 A JP 61302987A JP 30298786 A JP30298786 A JP 30298786A JP S63155692 A JPS63155692 A JP S63155692A
Authority
JP
Japan
Prior art keywords
adhesive
weight
epoxy resin
multilayer printed
parts
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61302987A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0588560B2 (enrdf_load_stackoverflow
Inventor
木俣 賢朗
杁山 卓男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP61302987A priority Critical patent/JPS63155692A/ja
Publication of JPS63155692A publication Critical patent/JPS63155692A/ja
Publication of JPH0588560B2 publication Critical patent/JPH0588560B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Wiring (AREA)
JP61302987A 1986-12-18 1986-12-18 多層プリント配線板及びその製造方法 Granted JPS63155692A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61302987A JPS63155692A (ja) 1986-12-18 1986-12-18 多層プリント配線板及びその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61302987A JPS63155692A (ja) 1986-12-18 1986-12-18 多層プリント配線板及びその製造方法

Publications (2)

Publication Number Publication Date
JPS63155692A true JPS63155692A (ja) 1988-06-28
JPH0588560B2 JPH0588560B2 (enrdf_load_stackoverflow) 1993-12-22

Family

ID=17915568

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61302987A Granted JPS63155692A (ja) 1986-12-18 1986-12-18 多層プリント配線板及びその製造方法

Country Status (1)

Country Link
JP (1) JPS63155692A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03101196A (ja) * 1989-09-13 1991-04-25 Ibiden Co Ltd 多層プリント配線基板及びその製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03101196A (ja) * 1989-09-13 1991-04-25 Ibiden Co Ltd 多層プリント配線基板及びその製造方法

Also Published As

Publication number Publication date
JPH0588560B2 (enrdf_load_stackoverflow) 1993-12-22

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