JPS6313381B2 - - Google Patents

Info

Publication number
JPS6313381B2
JPS6313381B2 JP53041672A JP4167278A JPS6313381B2 JP S6313381 B2 JPS6313381 B2 JP S6313381B2 JP 53041672 A JP53041672 A JP 53041672A JP 4167278 A JP4167278 A JP 4167278A JP S6313381 B2 JPS6313381 B2 JP S6313381B2
Authority
JP
Japan
Prior art keywords
signal
phase
output
data signal
modulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53041672A
Other languages
English (en)
Japanese (ja)
Other versions
JPS54133812A (en
Inventor
Yasutsune Yoshida
Yoshimi Tagashira
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP4167278A priority Critical patent/JPS54133812A/ja
Publication of JPS54133812A publication Critical patent/JPS54133812A/ja
Publication of JPS6313381B2 publication Critical patent/JPS6313381B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits
    • H04L27/227—Demodulator circuits; Receiver circuits using coherent demodulation
    • H04L27/2271—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals
    • H04L27/2272—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals using phase locked loops

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
JP4167278A 1978-04-07 1978-04-07 Phase synchronous circuit Granted JPS54133812A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4167278A JPS54133812A (en) 1978-04-07 1978-04-07 Phase synchronous circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4167278A JPS54133812A (en) 1978-04-07 1978-04-07 Phase synchronous circuit

Publications (2)

Publication Number Publication Date
JPS54133812A JPS54133812A (en) 1979-10-17
JPS6313381B2 true JPS6313381B2 (de) 1988-03-25

Family

ID=12614883

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4167278A Granted JPS54133812A (en) 1978-04-07 1978-04-07 Phase synchronous circuit

Country Status (1)

Country Link
JP (1) JPS54133812A (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58194450A (ja) * 1982-05-07 1983-11-12 Nec Corp 復調装置
JPS59196651A (ja) * 1983-04-23 1984-11-08 Nec Corp 復調装置
JP3252820B2 (ja) 1999-02-24 2002-02-04 日本電気株式会社 復調及び変調回路並びに復調及び変調方法
JP4842224B2 (ja) * 2007-08-01 2011-12-21 日本電信電話株式会社 ディジタル伝送システム

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4934764A (de) * 1972-07-31 1974-03-30
JPS5336412A (en) * 1976-09-17 1978-04-04 Fujitsu Ltd Synchronous lead-in system for false 4-phase modulation signal

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4934764A (de) * 1972-07-31 1974-03-30
JPS5336412A (en) * 1976-09-17 1978-04-04 Fujitsu Ltd Synchronous lead-in system for false 4-phase modulation signal

Also Published As

Publication number Publication date
JPS54133812A (en) 1979-10-17

Similar Documents

Publication Publication Date Title
US5430770A (en) Method and apparatus for composite signal separation and PSK/AM/FM demodulation
EP0645917B1 (de) Demodulator
US4313205A (en) Carrier synchronization and symbol synchronization for offset-QPSK burst communications
JPH021675A (ja) オフセットｑｐｓｋ方式用の搬送波再生回路
EP0504890B1 (de) Demodulator zur Demodulierung eines pi/4-umgetasteten DQPSK-Signals
JPS63151246A (ja) 同期復調装置における搬送波の同期を得るための方法及び装置
US5410573A (en) Digital phase-locked loop circuit
US4472817A (en) Non-PLL concurrent carrier clock synchronization
US4334312A (en) Phase synchronizing circuit for use in multi-level, multi-phase, superposition-modulated signal transmission system
JPS6313381B2 (de)
EP0293991B1 (de) Empfänger für ein phasenverschiebungsmodulierter Trägersignal
EP0098705A2 (de) Schaltung für eine Phasenriegelschleife
US4498050A (en) Demodulation device for composite PSK-PSK modulated waves
JPH10229423A (ja) タイミング再生回路及びこれを用いた復調器
JP3377858B2 (ja) クロック再生回路及びこれを用いた復調器
JP2689579B2 (ja) コスタスループ型復調器の疑似ロック検出回路
JP3265052B2 (ja) デジタル変調波の復調装置
JP3382892B2 (ja) 階層化伝送における位相変調信号をデジタル復調してフレーム同期パターン検出を行う方法及びその装置
JPH0219666B2 (de)
JP3230018B2 (ja) 復調器のクロック再生回路
JPH0479183B2 (de)
JPH0234552B2 (de)
JPH0532941B2 (de)
JPH06291791A (ja) 位相変調波信号の復調装置
JPS61216555A (ja) Ｍｓｋ信号の復調装置