JPS63118652U - - Google Patents
Info
- Publication number
- JPS63118652U JPS63118652U JP930987U JP930987U JPS63118652U JP S63118652 U JPS63118652 U JP S63118652U JP 930987 U JP930987 U JP 930987U JP 930987 U JP930987 U JP 930987U JP S63118652 U JPS63118652 U JP S63118652U
- Authority
- JP
- Japan
- Prior art keywords
- memory
- writing
- holding means
- output
- monitoring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012544 monitoring process Methods 0.000 claims description 3
- 230000006378 damage Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
Description
図は本考案の実施例を示し、第１図はブロツク
図、第２図は第１図における各部の波形を示すタ
イミングチヤート、第３図は書込み状況のフロー
チヤートである。
１……ＣＰＵ（プロセツサ）、２……ＭＥＭ（
メモリ）、５……ＦＦＣ（フリツプフロツプ回路
：保持手段）、６……ＡＮＤゲート（ゲート手段
）、７……ＣＵＴ（カウンタ：監視手段）。
The figures show an embodiment of the present invention; FIG. 1 is a block diagram, FIG. 2 is a timing chart showing waveforms of various parts in FIG. 1, and FIG. 3 is a flow chart of the writing situation. 1...CPU (processor), 2...MEM (
5...FFC (flip-flop circuit: holding means), 6...AND gate (gate means), 7...CUT (counter: monitoring means).
Claims (1)
に制限し、書込動作による前記メモリ中のデータ
破壊を防止するメモリ書込装置において、書込開
始命令によりセツトされ該状態を保持する保持手
段と、該保持手段の出力により活性化され前記一
定のデータ書込量を書込む最大時間よりやや長い
監視時間の経過後に出力を送出し前記保持手段を
リセツトする監視手段と、前記保持手段の出力に
より前記メモリへの書込信号を通過させる状態と
なるゲート手段とを設けたことを特徴とするメモ
リ書込装置。 In a memory writing device that limits the amount of continuous data written to a memory to a certain value and prevents data destruction in the memory due to a writing operation, a holding means that is set by a writing start command and maintains the state; monitoring means that is activated by the output of the holding means and resets the holding means by sending out an output after a monitoring time that is slightly longer than the maximum time for writing the fixed amount of data; What is claimed is: 1. A memory writing device comprising: gate means that allows a write signal to the memory to pass through.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP930987U JPS63118652U (en) | 1987-01-27 | 1987-01-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP930987U JPS63118652U (en) | 1987-01-27 | 1987-01-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63118652U true JPS63118652U (en) | 1988-08-01 |
Family
ID=30794502
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP930987U Pending JPS63118652U (en) | 1987-01-27 | 1987-01-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63118652U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61278943A (en) * | 1985-06-04 | 1986-12-09 | Matsushita Electric Ind Co Ltd | Register protecting circuit |
-
1987
- 1987-01-27 JP JP930987U patent/JPS63118652U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61278943A (en) * | 1985-06-04 | 1986-12-09 | Matsushita Electric Ind Co Ltd | Register protecting circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS59192740U (en) | computer equipment | |
| JPS63118652U (en) | ||
| JPH0197499U (en) | ||
| JPS61163400U (en) | ||
| JPS5851333U (en) | Program processing device | |
| JPH0270574U (en) | ||
| JPS58140599U (en) | Dynamic random access memory control circuit | |
| JPS5915153U (en) | Vehicle data recording device | |
| JPS61155956U (en) | ||
| JPS6130140U (en) | data transfer device | |
| JPS5920351U (en) | Adder circuit in microcomputer | |
| JPS59108945U (en) | transmission recording device | |
| JPS5922119U (en) | Ultrasound diagnostic equipment | |
| JPS61164551U (en) | ||
| JPS5810130U (en) | digital output circuit | |
| JPS60164258U (en) | data transfer control device | |
| JPS6438000U (en) | ||
| JPH0181794U (en) | ||
| JPH02133753U (en) | ||
| JPS613588U (en) | counter circuit | |
| JPS6030051U (en) | PCM data generation circuit | |
| JPS59118200U (en) | bubble memory device | |
| JPS5816955U (en) | PCM signal generator | |
| JPS58176217U (en) | Head cleaning time warning device | |
| JPS5891786U (en) | Copy machine character display device |