JPS63110042U - - Google Patents
Info
- Publication number
- JPS63110042U JPS63110042U JP154587U JP154587U JPS63110042U JP S63110042 U JPS63110042 U JP S63110042U JP 154587 U JP154587 U JP 154587U JP 154587 U JP154587 U JP 154587U JP S63110042 U JPS63110042 U JP S63110042U
- Authority
- JP
- Japan
- Prior art keywords
- angled surface
- carrier
- holding
- semiconductor
- suction hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 4
- 235000012431 wafers Nutrition 0.000 claims 2
- 238000004519 manufacturing process Methods 0.000 claims 1
- 239000012050 conventional carrier Substances 0.000 description 1
Landscapes
- Packaging Frangible Articles (AREA)
- Warehouses Or Storage Devices (AREA)
- Sheets, Magazines, And Separation Thereof (AREA)
Description
第１図は本考案に係る第１の実施例のキヤリア
の要部拡大平面断面図、第２図は同じく第２の実
施例のキヤリアの要部拡大平面断面図、第３図は
同じく実施例のキヤリア全体の斜視図である。第
４図は従来のキヤリアの斜視図、第５図は従来の
保持溝部の平面図である。
１１，２１……キヤリア、１２，２２……第１
の側板、１３，２３……第２の側板、１６ａ，２
６ａ……テーパ面、１６ｂ，２６ｂ……直角面、
１７，２７……半導体ウエーハ、１８，２８……
吸引孔、１９，２９……吸着孔。
FIG. 1 is an enlarged plan sectional view of the main parts of the carrier of the first embodiment according to the present invention, FIG. 2 is an enlarged plan sectional view of the main parts of the carrier of the second embodiment, and FIG. 3 is the same embodiment. FIG. 2 is a perspective view of the entire carrier. FIG. 4 is a perspective view of a conventional carrier, and FIG. 5 is a plan view of a conventional holding groove. 11, 21...Carrier, 12, 22...1st
side plate, 13, 23... second side plate, 16a, 2
6a...Tapered surface, 16b, 26b...Right angle surface,
17, 27... semiconductor wafer, 18, 28...
Suction hole, 19, 29... Suction hole.
Claims (1)
に、半導体ウエーハを保持する多数の保持溝を定
ピツチで対設したキヤリアにおいて、 上記保持溝を、側板面に対し直角面と、内方へ
拡がるテーパ面とで構成し、 上記直角面の半導体ウエーハが当接する部分か
ら側板外方へ連通する吸着孔を穿設したことを特
徴とする半導体製造治具。[Scope of Claim for Utility Model Registration] In a carrier in which a number of holding grooves for holding semiconductor wafers are set opposite each other at a fixed pitch on the inner surfaces of opposing side plates that are connected at a predetermined interval, 1. A semiconductor manufacturing jig comprising a right-angled surface and a tapered surface expanding inward, and having a suction hole that communicates with the outside of the side plate from the portion of the right-angled surface that contacts the semiconductor wafer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP154587U JPS63110042U (en) | 1987-01-08 | 1987-01-08 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP154587U JPS63110042U (en) | 1987-01-08 | 1987-01-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63110042U true JPS63110042U (en) | 1988-07-15 |
Family
ID=30779552
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP154587U Pending JPS63110042U (en) | 1987-01-08 | 1987-01-08 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63110042U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003077988A (en) * | 2001-09-06 | 2003-03-14 | Nitto Denko Corp | Semiconductor wafer mounting method and cassette used therefor |
-
1987
- 1987-01-08 JP JP154587U patent/JPS63110042U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003077988A (en) * | 2001-09-06 | 2003-03-14 | Nitto Denko Corp | Semiconductor wafer mounting method and cassette used therefor |
| JP4748901B2 (en) * | 2001-09-06 | 2011-08-17 | 日東電工株式会社 | Semiconductor wafer mounting method and cassette used therefor |
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