JPS6289141U - - Google Patents
Info
- Publication number
- JPS6289141U JPS6289141U JP18088085U JP18088085U JPS6289141U JP S6289141 U JPS6289141 U JP S6289141U JP 18088085 U JP18088085 U JP 18088085U JP 18088085 U JP18088085 U JP 18088085U JP S6289141 U JPS6289141 U JP S6289141U
- Authority
- JP
- Japan
- Prior art keywords
- land
- semiconductor element
- hook
- corners
- mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 3
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/27011—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
- H01L2224/27013—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
Description
第１図及び第２図はこの考案の一実施例を示す
図で、第１図は斜視図、第２図は要部の拡大斜視
図である。
１……回路パターン、２……半導体素子、３…
…ランド、４……かぎ形の溝。
1 and 2 are views showing one embodiment of this invention, with FIG. 1 being a perspective view and FIG. 2 being an enlarged perspective view of the main parts. 1...Circuit pattern, 2...Semiconductor element, 3...
...Land, 4...Hook-shaped groove.
Claims (1)
溝を形成して成ることを特徴とする半導体素子実
装用のランド。 A land for mounting a semiconductor element, characterized in that hook-shaped grooves are formed at the four corners of the land on which the semiconductor element is mounted.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18088085U JPS6289141U (en) | 1985-11-25 | 1985-11-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18088085U JPS6289141U (en) | 1985-11-25 | 1985-11-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6289141U true JPS6289141U (en) | 1987-06-08 |
Family
ID=31125239
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18088085U Pending JPS6289141U (en) | 1985-11-25 | 1985-11-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6289141U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01293557A (en) * | 1988-05-20 | 1989-11-27 | Mitsubishi Electric Corp | Semiconductor device |
| JP2014060211A (en) * | 2012-09-14 | 2014-04-03 | Omron Corp | Substrate structure, semiconductor chip mounting method and solid state relay |
| JP2014132682A (en) * | 2014-03-14 | 2014-07-17 | Renesas Electronics Corp | Resin encapsulated semiconductor device manufacturing method |
-
1985
- 1985-11-25 JP JP18088085U patent/JPS6289141U/ja active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01293557A (en) * | 1988-05-20 | 1989-11-27 | Mitsubishi Electric Corp | Semiconductor device |
| JP2014060211A (en) * | 2012-09-14 | 2014-04-03 | Omron Corp | Substrate structure, semiconductor chip mounting method and solid state relay |
| JP2014132682A (en) * | 2014-03-14 | 2014-07-17 | Renesas Electronics Corp | Resin encapsulated semiconductor device manufacturing method |