JPS63107065U - - Google Patents
Info
- Publication number
- JPS63107065U JPS63107065U JP20145586U JP20145586U JPS63107065U JP S63107065 U JPS63107065 U JP S63107065U JP 20145586 U JP20145586 U JP 20145586U JP 20145586 U JP20145586 U JP 20145586U JP S63107065 U JPS63107065 U JP S63107065U
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- inverting
- operational amplifier
- input terminal
- field effect
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005669 field effect Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 3
Description
第１図は本考案による自乗関数回路の１実施例
を示す回路図、第２図は本実施例におけるゲート
・ドレインを接続したＦＥＴのドレイン・ソース
電圧―ドレイン電流特性を示す図、第３図はＦＥ
Ｔのドレイン・ソース電圧―ドレイン電流特性を
示す図、第４図、第５図、第６図は関数回路の従
来例を示す回路図である。
１……エンハンスメント型ＦＥＴ、２……反転
演算増幅器、３……帰還抵抗。
Fig. 1 is a circuit diagram showing one embodiment of the square function circuit according to the present invention, Fig. 2 is a diagram showing the drain-source voltage-drain current characteristics of the FET with the gate and drain connected in this embodiment, and Fig. 3. is FE
4, 5, and 6 are circuit diagrams showing conventional examples of functional circuits. 1...Enhancement type FET, 2...Inverting operational amplifier, 3...Feedback resistor.
Claims (1)
力端子と演算増幅器の反転入力端子間に非線形素
子を挿入した自乗関数回路において、該非線形素
子としてゲート端子とドレイン端子を接続したエ
ンハンスメント型電界効果トランジスタを用い、
該電界効果トランジスタの接続されたゲート端子
とドレイン端子を信号入力端子とし、ソース端子
を前記演算増幅器の反転入力端子に接続したこと
を特徴とする自乗関数回路。 In a square function circuit in which a nonlinear element is inserted between the signal input terminal of an inverting amplifier circuit using an inverting operational amplifier and the inverting input terminal of the operational amplifier, an enhancement type field effect transistor whose gate terminal and drain terminal are connected is used as the nonlinear element. use,
A square function circuit characterized in that the connected gate terminal and drain terminal of the field effect transistor are used as signal input terminals, and the source terminal is connected to the inverting input terminal of the operational amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20145586U JPS63107065U (en) | 1986-12-27 | 1986-12-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20145586U JPS63107065U (en) | 1986-12-27 | 1986-12-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63107065U true JPS63107065U (en) | 1988-07-11 |
Family
ID=31164923
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20145586U Pending JPS63107065U (en) | 1986-12-27 | 1986-12-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63107065U (en) |
-
1986
- 1986-12-27 JP JP20145586U patent/JPS63107065U/ja active Pending
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