JPS62151221U - - Google Patents
Info
- Publication number
- JPS62151221U JPS62151221U JP3952186U JP3952186U JPS62151221U JP S62151221 U JPS62151221 U JP S62151221U JP 3952186 U JP3952186 U JP 3952186U JP 3952186 U JP3952186 U JP 3952186U JP S62151221 U JPS62151221 U JP S62151221U
- Authority
- JP
- Japan
- Prior art keywords
- matching circuit
- field effect
- effect transistor
- circuit connected
- high frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005669 field effect Effects 0.000 claims 3
- 238000010586 diagram Methods 0.000 description 6
- 230000001681 protective effect Effects 0.000 description 1
Landscapes
- Microwave Amplifiers (AREA)
- Amplifiers (AREA)
Description
第1図はこの考案の一実施例による温度補償型
高周波増幅器の回路図、第2図は従来の温度補償
型高周波増幅器の回路図、第3図は利得温度特性
図、第4図はゲートバイアス電圧の温度特性図、
第5図はゲートバイアス電圧と利得との関係図、
第6図はこの考案におけるゲートバイアス回路抵
抗とドレイン電流とドレイン電圧の温度特性図で
ある。
図において、1はFET、2はゲート端子、3
はドレイン端子、9は第1のサーミスタ、18は
保護抵抗、20は第2のサーミスタである。なお
、図中、同一符号は同一または相当部分を示す。
Figure 1 is a circuit diagram of a temperature compensated high frequency amplifier according to an embodiment of this invention, Figure 2 is a circuit diagram of a conventional temperature compensated high frequency amplifier, Figure 3 is a gain temperature characteristic diagram, and Figure 4 is a gate bias Voltage temperature characteristic diagram,
Figure 5 is a diagram of the relationship between gate bias voltage and gain.
FIG. 6 is a temperature characteristic diagram of gate bias circuit resistance, drain current, and drain voltage in this invention. In the figure, 1 is FET, 2 is gate terminal, 3
is a drain terminal, 9 is a first thermistor, 18 is a protective resistor, and 20 is a second thermistor. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.
Claims (1)
ジスタのゲート端子に接続した入力整合回路と、
前記入力整合回路に接続したゲートバイアス回路
と、前記電界効果トランジスタのドレイン端子に
接続した出力整合回路と、前記出力整合回路に接
続したドレインバイアス回路とで構成した高周波
増幅器において、前記ドレインバイアス回路に利
得温度補償回路を備えたことを特徴とする温度補
償型高周波増幅器。 a field effect transistor; an input matching circuit connected to a gate terminal of the field effect transistor;
In a high frequency amplifier configured with a gate bias circuit connected to the input matching circuit, an output matching circuit connected to the drain terminal of the field effect transistor, and a drain bias circuit connected to the output matching circuit, the drain bias circuit A temperature compensated high frequency amplifier characterized by being equipped with a gain temperature compensation circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3952186U JPS62151221U (en) | 1986-03-18 | 1986-03-18 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3952186U JPS62151221U (en) | 1986-03-18 | 1986-03-18 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62151221U true JPS62151221U (en) | 1987-09-25 |
Family
ID=30852765
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3952186U Pending JPS62151221U (en) | 1986-03-18 | 1986-03-18 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62151221U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01139613U (en) * | 1988-03-18 | 1989-09-25 | ||
JPH0273815U (en) * | 1988-11-25 | 1990-06-06 |
-
1986
- 1986-03-18 JP JP3952186U patent/JPS62151221U/ja active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01139613U (en) * | 1988-03-18 | 1989-09-25 | ||
JPH0273815U (en) * | 1988-11-25 | 1990-06-06 |