JPS63102258U - - Google Patents
Info
- Publication number
- JPS63102258U JPS63102258U JP19802886U JP19802886U JPS63102258U JP S63102258 U JPS63102258 U JP S63102258U JP 19802886 U JP19802886 U JP 19802886U JP 19802886 U JP19802886 U JP 19802886U JP S63102258 U JPS63102258 U JP S63102258U
- Authority
- JP
- Japan
- Prior art keywords
- type
- collector region
- transistor
- pnp
- type collector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000009792 diffusion process Methods 0.000 claims description 4
- 239000012535 impurity Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Landscapes
- Bipolar Transistors (AREA)
Description
第1図は本考案の一実施例の断面図、第2図は
同実施例で、PN接合に逆バイアスを加えた時の
空乏層の伸びを示した図、第3図は従来例の断面
図、第4図は同従来例で、PN接合に逆バイアス
を加えた時の空乏層の伸びを示した図、第5図は
他の従来例で、PN接合に逆バイアスを加えた時
の空乏層の伸びを示した図である。
1……P型シリコン基板、2……ベース拡散領
域(N型)、3……エミツタ拡散領域(P型)、
4……P+反転層ストツパー、5……ベース電極
、6……エミツタ電極、7……オーバレイ電極、
8……絶縁膜(SiO2膜)、9……反転層、1
0……コレクタ電極、13……ガードリング状の
P型拡散層。
Figure 1 is a cross-sectional view of one embodiment of the present invention, Figure 2 is a diagram showing the extension of the depletion layer when a reverse bias is applied to the PN junction, and Figure 3 is a cross-sectional view of the conventional example. Figure 4 shows the same conventional example, showing the elongation of the depletion layer when a reverse bias is applied to the PN junction, and Figure 5 shows another conventional example, showing the growth of the depletion layer when a reverse bias is applied to the PN junction. FIG. 3 is a diagram showing the extension of a depletion layer. 1... P type silicon substrate, 2... Base diffusion region (N type), 3... Emitter diffusion region (P type),
4...P + inversion layer stopper, 5...Base electrode, 6...Emitter electrode, 7...Overlay electrode,
8... Insulating film (SiO 2 film), 9... Inversion layer, 1
0... Collector electrode, 13... Guard ring-shaped P-type diffusion layer.
Claims (1)
P型コレクタ領域の表面部に、該P型コレクタ領
域よりも不純物濃度の高いガードリング状のP型
拡散層を複数本形成したことを特徴とするPNP
トランジスタ。 In a planar type PNP transistor,
A PNP characterized in that a plurality of guard ring-shaped P-type diffusion layers having a higher impurity concentration than the P-type collector region are formed on the surface of the P-type collector region.
transistor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19802886U JPS63102258U (en) | 1986-12-22 | 1986-12-22 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19802886U JPS63102258U (en) | 1986-12-22 | 1986-12-22 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63102258U true JPS63102258U (en) | 1988-07-02 |
Family
ID=31158338
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19802886U Pending JPS63102258U (en) | 1986-12-22 | 1986-12-22 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63102258U (en) |
-
1986
- 1986-12-22 JP JP19802886U patent/JPS63102258U/ja active Pending
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