JPS629625A - Method for formation of microscopic electrode - Google Patents

Abstract

PURPOSE:To enable to form apertures in the desired size accurately by a method wherein an aperture, where the first conductive type impurity region is exposed, is provided on the oxide film whereon the aperture to be used for formation of the second conductive type impurity region is formed, and an electrode is provided to the above-mentioned aperture and the aperture to be used for formation of the second conductive type impurity region. CONSTITUTION:The apertures 19 and 20 to be used for a base electrode are perforated on the silicon dioxide film 14 located on a base region 15. When said apertures 19 and 20 are going to be perforated, as the surface of the silicon dioxide film 14 is flat, a photomask can be almost tightly fixed to the surface, and the apertures 19 and 20 of the desired size can be formed. Accordingly, a metal such as aluminum, for example, is vapor-deposited on the silicon dioxide film 14, the exposed base region 15, and a polysilicon film 17, it is pattern- formed into a base electrode 21 and an emitter electrode 22.

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to a method for forming a microelectrode, and particularly to a microelectrode that allows electrodes to be connected to each region to be precisely drilled to predetermined dimensions after forming a PN junction. The present invention relates to a method of forming.

<Prior Art> FIGS. 2(a) to 2(f) are process diagrams showing a conventional example, and FIG. 2(a) shows a semiconductor substrate 2 on which a thermal oxide film 1 has been grown. An opening 3 is formed in the thermal oxide film 1 through a lithography process (FIG. 2(b)), and impurities are diffused through the opening 3 to form a base region 4. During the diffusion process, an oxide film 5 is grown on the base region 4, and a step is formed between the thermal oxide film 1 and the oxide film 5 (see FIG. 2).
C)). Subsequently, an opening 6 for emitter diffusion is formed in the oxide film 5 (FIG. 2(d)), and impurities are diffused through the opening 6 to form an emitter region 7. Since the oxide film 8 grows on the emitter region 7 during the diffusion process of the emitter region 7, a step is again formed between the oxide film 5 and the oxide film 8 (FIG. 2(e)). Therefore, in order to form openings for electrodes, first, photoresist is applied to the thermal oxide film 1 and the oxide film 5.8, a photomask is brought into contact with the surface of the thermal oxide film 1, and then the photoresist is formed by exposure. Transfer the photomask pattern onto the membrane. After post-baking, the photoresist film is patterned, and openings 9, 8 are formed in the oxide films 5 and 8 using the patterned photoresist film as a mask.
10 is drilled (FIG. 2(f)).

<Problems to be Solved by the Invention> In the above conventional example, since steps were formed between the thermal oxide film 1 and the oxide films 5 and 8, the openings 9 and 1
0, the distances from the photomask applied to the surface of the thermal oxide film 1 to the oxide films 5 and 8 become different.

Generally, if the wavelength of the irradiated light is λ and the distance between the photomask and the photoresist film is G, then the resolution R is G
is proportional to the square root of the product of and λ. Therefore, the aperture 9
In addition to there being a difference in the dimensional accuracy of the opening 10 and the dimensional accuracy of the opening 10, there is also a difference in the thickness of the oxide films 5 and 8.

This is because the oxide film 8 is over-etched.

The dimensions of the openings 9, 10 tend to be undesirable values.
Therefore, from the viewpoint of resolution, the base region 4 and the emitter region 7 had to be formed large, which was problematic because of the need for overetching.

A means for solving problems>> In light of the above problems, after introducing the first conductive impurities, the oxide film is formed on the surface of the semiconductor substrate, and the oxide film is the second conductor. While forming the impurity region of the mold,
Summary: Without removing this oxide film, openings were drilled in the oxide film, and electrodes were formed at the Sekiguchi used to introduce the second conductivity type impurity and at the newly drilled openings. shall be.

<Embodiment> FIGS. 1(a) to 1(h) show an embodiment of the present invention, in which numeral 11 indicates an N-type semiconductor substrate, and the surface of the semiconductor substrate 11 has a Approximately 1000 silicon dioxide films 12 are grown (FIG. 1(a)).
A photoresist 13 is coated on the silicon dioxide film 12, and after patterning, an impurity dose setting piece 10''i is applied.
On s/13 P-type impurity 1, such as boron, is ion-implanted into the semiconductor substrate 11 (FIG. 1(b)).
.

After removing the photoresist film, a silicon dioxide film 14 is deposited on the silicon dioxide film 12 to a thickness of about 1,500 mm by CVD (FIG. 1(Q)).

A base region 15 is formed through a heat treatment process at approximately 900° C. to 1000° C. (FIG. 1(d)).

In the subsequent step, a gate 16 is formed in the silicon dioxide film 14 and the base region 15 is exposed.

In the step of forming the opening 16, after the silicon dioxide film 14 is coated with photoresist, the photoresist film is patterned by a contact exposure method.

The pattern of the photomask is accurately transferred to the photoresist film, and a gate 16 of a desired size can be formed.

Once the base region 15 is exposed, a polysilicon film 17 of about 500 to 1000 layers containing an N-type impurity, for example, phosphorus, is deposited on the exposed base region 15 and the silicon dioxide film 14. A cap oxide film is formed on the surface (FIG. 1(e)). After the cap oxide film is formed, phosphorus is diffused from the polysilicon film 17 into the semiconductor substrate 11 by heat treatment, and an N-type emitter region 18 is formed. After this, the cap oxide film is removed by etching the entire surface, and the polysilicon 1i17 is removed from the emitter region 1.
It is etched except for the top part 8 (FIG. 1(f)).

Subsequently, openings 19 and 20 for base electrodes are formed in the silicon dioxide film 14 on the base region 15 (see FIG. 1(g)).
)). In forming the openings 19.20, since the surface of the silicon dioxide film 14 is flat, the photomask can be brought into substantially close contact with the surface, and the openings 19.20 of desired dimensions can be formed. Therefore, the silicon dioxide film 14, the exposed base region 15 and the polysilicon film 1
7 and evaporate a metal, for example, aluminum.

By patterning this, a base electrode 21 and an emitter electrode 22 are formed (FIG. 1(h)).

At this time, the base electrode 21 and the emitter electrode 22 are on substantially the same plane, and the same can be said for the photomask process for forming the electrodes as for forming the openings 19 and 20.

<Effects> As described above, according to the present invention, the impurity region of the first conductivity type is formed in the oxide film without removing the oxide film in which the opening for forming the impurity region of the second conductivity type is formed. An opening is provided to expose the impurity region, and an electrode is provided in the opening and the opening for forming the second conductivity type impurity region. Therefore, both openings can be patterned using a contact exposure method, and the opening can be formed as desired. The effect is that it can be formed accurately to the dimensions of .

Moreover, since the dimensions of the openings in which the electrodes are formed can be precisely controlled, the impurity regions of the first conductivity type and the impurity regions of the second conductivity type can be reduced, which improves the degree of integration and further improves the efficiency of transistors. The effect is that the characteristics can be improved.

[Brief explanation of drawings]

FIGS. 1(a) to (h) are process diagrams of an embodiment of the present invention,
FIGS. 2(a) to 2(f) are process diagrams of a conventional example. 11... Semiconductor substrate, 13... Mask layer, 14... Oxide film. 15... First conductivity type impurity region, 16.1
9.20・Opening, 18・・・・Impurity region of second conductivity type. 21.22... Electrode. Patent Applicant ROHM Co., Ltd. Representative Patent Attorney Kiyoshi Kuwai - (e!4) (C) (d) Figure 1 (11') Figure 1 C=3) (b) Figure 2 Now ((1') ) (e) Figure 2

Claims (1)

[Claims] A step of introducing impurities of a first conductivity type through a mask layer formed on the surface of the semiconductor substrate, a step of removing the mask layer to form an oxide film on the surface of the semiconductor substrate, and forming an opening in the oxide film. introducing an impurity into the surface of the semiconductor substrate through the opening to form an impurity region of a second conductivity type within the impurity region of the first conductivity type; and forming an opening in the oxide film to form an impurity region of the first conductivity type. exposing the impurity region of the first conductivity type and the impurity region of the second conductivity type; A method for forming a microelectrode comprising the step of connecting to impurity regions of two conductivity types.