JPS6260755B2 - - Google Patents

Info

Publication number
JPS6260755B2
JPS6260755B2 JP57090617A JP9061782A JPS6260755B2 JP S6260755 B2 JPS6260755 B2 JP S6260755B2 JP 57090617 A JP57090617 A JP 57090617A JP 9061782 A JP9061782 A JP 9061782A JP S6260755 B2 JPS6260755 B2 JP S6260755B2
Authority
JP
Japan
Prior art keywords
memory
adder
fixed value
address
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57090617A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58208981A (ja
Inventor
Hisao Ishizuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP9061782A priority Critical patent/JPS58208981A/ja
Publication of JPS58208981A publication Critical patent/JPS58208981A/ja
Publication of JPS6260755B2 publication Critical patent/JPS6260755B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Complex Calculations (AREA)
JP9061782A 1982-05-28 1982-05-28 アドレス制御回路 Granted JPS58208981A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9061782A JPS58208981A (ja) 1982-05-28 1982-05-28 アドレス制御回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9061782A JPS58208981A (ja) 1982-05-28 1982-05-28 アドレス制御回路

Publications (2)

Publication Number Publication Date
JPS58208981A JPS58208981A (ja) 1983-12-05
JPS6260755B2 true JPS6260755B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1987-12-17

Family

ID=14003445

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9061782A Granted JPS58208981A (ja) 1982-05-28 1982-05-28 アドレス制御回路

Country Status (1)

Country Link
JP (1) JPS58208981A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4835733A (en) * 1985-09-30 1989-05-30 Sgs-Thomson Microelectronics, Inc. Programmable access memory
US4935867A (en) * 1986-03-04 1990-06-19 Advanced Micro Devices, Inc. Signal processor memory management unit with indirect addressing using selectable offsets and modulo values for indexed address calculations
FR2605765A1 (fr) * 1986-10-28 1988-04-29 Eurotechnique Sa Procede d'adressage d'une memoire et compteur d'adressage pour la mise en oeuvre du procede

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5752664B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1974-12-27 1982-11-09
JPS5437644A (en) * 1977-08-31 1979-03-20 Toshiba Corp Information processing system
JPS5552581A (en) * 1978-10-11 1980-04-17 Advantest Corp Pattern generator

Also Published As

Publication number Publication date
JPS58208981A (ja) 1983-12-05

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