JPS6260747B2 - - Google Patents

Info

Publication number
JPS6260747B2
JPS6260747B2 JP55080655A JP8065580A JPS6260747B2 JP S6260747 B2 JPS6260747 B2 JP S6260747B2 JP 55080655 A JP55080655 A JP 55080655A JP 8065580 A JP8065580 A JP 8065580A JP S6260747 B2 JPS6260747 B2 JP S6260747B2
Authority
JP
Japan
Prior art keywords
circuit
demodulation
pulse
edge detection
clock pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55080655A
Other languages
English (en)
Japanese (ja)
Other versions
JPS576423A (en
Inventor
Toshiaki Hioki
Yoshihiko Asano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP8065580A priority Critical patent/JPS576423A/ja
Publication of JPS576423A publication Critical patent/JPS576423A/ja
Publication of JPS6260747B2 publication Critical patent/JPS6260747B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
JP8065580A 1980-06-13 1980-06-13 Demodulating circuit of mfm modulation signal Granted JPS576423A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8065580A JPS576423A (en) 1980-06-13 1980-06-13 Demodulating circuit of mfm modulation signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8065580A JPS576423A (en) 1980-06-13 1980-06-13 Demodulating circuit of mfm modulation signal

Publications (2)

Publication Number Publication Date
JPS576423A JPS576423A (en) 1982-01-13
JPS6260747B2 true JPS6260747B2 (de) 1987-12-17

Family

ID=13724366

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8065580A Granted JPS576423A (en) 1980-06-13 1980-06-13 Demodulating circuit of mfm modulation signal

Country Status (1)

Country Link
JP (1) JPS576423A (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5934216U (ja) * 1982-08-30 1984-03-02 リンナイ株式会社 焼成器
JPS59165212A (ja) * 1983-03-08 1984-09-18 Sony Corp 情報信号再生装置
US4633488A (en) * 1984-11-13 1986-12-30 Digital Equipment Corporation Phase-locked loop for MFM data recording
US4734900A (en) * 1986-04-25 1988-03-29 International Business Machines Corporation Restoring and clocking pulse width modulated data
US10749717B2 (en) * 2017-06-29 2020-08-18 Analog Devices, Inc. Demodulator for pulse-width modulated clock signals

Also Published As

Publication number Publication date
JPS576423A (en) 1982-01-13

Similar Documents

Publication Publication Date Title
JPH0132591B2 (de)
JPH0551982B2 (de)
JPH0877502A (ja) ピークシフト補正回路およびそれを使用した磁気記録媒体再生装置
EP0407094B1 (de) Reproduziereinrichtung für digitale Signale
JPS6260747B2 (de)
US3636536A (en) Derived clock circuit in a phase modulated digital data handling system
US4912573A (en) Digital data reproducing apparatus having recording modulation mode detection
JPS6126975A (ja) 光デイスク制御装置
JPH0879059A (ja) 基準クロック発生回路
JP2573245B2 (ja) 復調回路
JPS6356871A (ja) デジタルデ−タ生成装置
JPH0743890B2 (ja) デイジタル信号伝送装置
JPS6348109B2 (de)
JPS595965B2 (ja) デイジタル記録におけるクロツク信号抽出回路
JP3276700B2 (ja) ディスクのデータ記録方法およびディスクのデータ記録再生方法
JPS58222410A (ja) ２進デ−タの記録再生装置
JPH0247653Y2 (de)
JPS6217307B2 (de)
JPS626463A (ja) クロツク再生回路
JPH0356030B2 (de)
JPH0557668B2 (de)
JPS6062241A (ja) 位相制御回路
JPS62189629A (ja) ダビング装置
JPH03171460A (ja) 磁気記録方法及び装置
JPS59217213A (ja) 同期信号方式