JPS6247750A - Storage device - Google Patents

Abstract

PURPOSE:To attain the diagnosis for success of a retry by instructing the generating frequency of errors through an error frequency setting register to produce an optional frequency of errors and therefore preventing the generation of errors to the access of the frequencies at and after said optional frequency. CONSTITUTION:The diagnosis data are first sent to signal lines 10 and 14 and '1' is set to an error frequency setting register 1 and a pseudo trouble register 2 respectively. Then the control signal for a normal writing or reading action is supplied to a control circuit 3 from a signal line 16. Thus the action instructing signal on a signal line 17 is set at '1' and an error detecting circuit 8 is actuated to transmit the error signals. At the same time, '1' is set to a diagnosis register 6. The error signal is also transmitted with a normal writing or reading action and the output of an AND gate 7 is set at '1'. Thus an error frequency selecting circuit 4 is set at '0' and registers 1, 2 and 6 are reset. As a result, no error is produced with access following at and after the 3rd access.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a storage device having a maintenance/diagnosis function, and particularly to a method of generating pseudo failures therein.

(Prior Art) Conventionally, when a write/read command is executed from a system control device with a pseudo failure set in a diagnostic register by a maintenance diagnostic function, an error always occurs.

(Problems to be Solved by the Invention) In the above-described conventional method of simply setting a pseudo failure in the diagnostic register, errors appear fixed to the system control device. Therefore, even if the address where the error occurred is accessed again using the instruction retry function, an error will occur and the accessed address area will be separated. The drawback was that it was impossible to diagnose whether a retry was successful without causing an error.

An object of the present invention is to provide a storage device having a maintenance diagnosis function and capable of setting a pseudo-failure, in which the number of occurrences of an error is specified by an error count set register, and a pseudo-fault is set by a pseudo-fault register. The logical product of the contents of the pseudo-fault register and the operation instruction signal from the system control device is calculated, and a plurality of pairs of diagnostic registers and AND gates are provided according to the number of errors, and the plurality of AN
To provide a storage device configured to remove the above drawback by selecting one of the AND output signals of a D gate by an error number selection circuit and generating an arbitrary number of errors, and to diagnose whether the IJ) write is successful. It's about doing.

(Means for solving the problem) The storage device according to the present invention includes a pseudo-fault register, an error count set register, an AND gate, and a plurality of AND gates.
Equipped with a gated diagnostic register, an error count select circuit, and an error detection circuit, it can execute write/read operations in response to write/read commands from the 7-stem control device, perform maintenance diagnosis, and simulate It is configured so that a failure can be set.

The pseudo fault register is for setting a pseudo fault, and the error count set register is for indicating the number of times an error has occurred.

The AND gate is for calculating the logical product of the output signal of the pseudo-fault register and the write/read operation instruction signal from the system control device.

The plurality of diagnostic registers with AND gates are connected in series in [(maximum number of errors)-1].

The error count select circuit is for selecting one of the [(maximum error count)-1] output signals based on the output signal of the error count set register.

The error detection circuit is for detecting errors from the output signal of the pseudo-fault register.

(Example) Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a storage device in which the number of errors is two. In Fig. 1, 1 is an error count set register, 2 is a pseudo-fault register, 3 is a control circuit, 4 is an error count select circuit, 5 is an AND gate, 6 is a diagnostic register, 7 is an AND gate, and 8 is an error detection circuit. , 9 are error registers.

FIG. 2 is a timing chart showing the operation of FIG. 1. In FIG. 2, a diagnostic write operation is executed from the system control device, followed by a normal write operation or read operation eight times. The sequence is shown when control signals such as requests are sent in order. System controller (
Control signals such as requests are sent from signal line 1 (not shown).
6, the control circuit 3 instructs a diagnostic writing operation. A diagnostic data name is sent out on signal line 10.14 with a delay of one clock after the request on signal line 16, and tIN is set in error count set register 1 and pseudo failure register 2, respectively. After a request for a diagnostic write operation, a control signal such as a request for a normal write operation or a normal read operation is sent onto the signal line 16 at the clock next to the request for a diagnostic write operation, and the control circuit 3 performs a normal write operation. , or direct a normal read operation. In the case of a normal write operation or a normal read operation, the operation instruction signal on signal line 17 becomes %11. Since the operation instruction signal on the signal line 17 and the pseudo failure signal on the signal line 15 are 111, the error detection circuit 8 operates and an error signal is generated on the signal line 21, and the system control is performed via the error register 9. An error is sent to a device (not shown).

On the other hand, at the same time that %IJF is set in the diagnostic register 6, the operation instruction signal for the next normal write operation or read command becomes %11 on the signal line 17. In addition, since the pseudo fault signal on signal line 15 remains Kame II,
The error detection circuit 8 operates to generate a second error signal, which is sent to the system controller. When the operation instruction signal for the second normal write operation or read operation instruction is %11 on the signal line 11, the diagnostic register 6
Since the output signal on signal line 23 is %11, the AND signal on signal line 19 is %11. Further, since the error count set signal is 111 on the signal line 11 at this time, two errors are selected and the reset signal becomes -O1 on the signal line 13. Therefore, the pseudo failure register 2, the error count set register 1, and the register 6 are reset.

Therefore, no error occurs for the third or subsequent normal write operation or normal read operation command.

The operation in the case where two errors occur has been explained above, but in order to generate up to four errors, two circuits of a pair consisting of the diagnostic register 6 and the AND gate 7 are connected in series after the AND gate 7. At the same time, the outputs of the AND gates of these two circuits are input to the error count selection circuit 4. The output signal from the error count selection circuit 4 onto the signal line 13 is input to two circuits of registers. Further, the input to the error count set register 10 requires 2 bits, and the 2 bits select the number of error occurrences from 1 to 4.

Similarly, more than four errors can occur.

FIG. 3 shows a general block diagram when an error is caused to occur N times (maximum number of error occurrences).

In FIG. 8, elements similar to those in FIG. 1 are numbered the same. Also, 6-1 to 6-(N-1) is (N-1)
1-1 to 7-(N-1) are (
N-1) AND gates are shown.

(Effects of the Invention) As explained above, the present invention has a storage device that has a maintenance diagnosis function and can set pseudo-faults, by instructing the number of occurrences of Sheller in the error count set register and setting pseudo-faults. A pseudo-fault is set in the fault register, the logical product of the content of the pseudo-fault register and the operation instruction signal from the 7-stem control device is calculated, and a plurality of pairs of diagnostic registers and AND gates are created according to the number of errors. By selecting one of the AND output signals of the plurality of AND gates in the error count selection circuit and generating an arbitrary number of errors, diagnosis can be made in accordance with the command retry function of each system control device. This has the effect of making it easy to carry out.

[Brief explanation of the drawing]

FIGS. 1 and 3 are block diagrams each showing an embodiment of a storage device according to the present invention. FIG. 2 is a timing chart showing an example of the operation of the storage device shown in FIG. 1 Cloud...Error count set register 2...Pseudo failure register 3...Control circuit 4...Error count select circuit 5, 7, 7-1, 1-2,...-1-(N-1
)・---・AND gate 6 , 6-1 , 6-2 , ... 6-(N-1)@・
...Diagnostic register 8...Error detection circuit 9...Error register 1G, 11.13~23.19-1~19-(N-1)
, 23-1 to 25-(N-1)...Signal line

Claims (1)

[Claims] A pseudo-fault register for setting a pseudo-fault, an error count set register for indicating the number of times an error has occurred, and an output signal of the pseudo-fault register and a write/read operation from a system control device. An AND gate for calculating the logical product with the instruction signal, and [(maximum number of errors) -1
] for selecting one of the [(maximum number of errors) - 1] output signals based on the output signal of the plurality of serially connected diagnostic registers with AND gates and the output signal of the error number set register. It is equipped with an error count selection circuit and an error detection circuit for detecting errors from the output signal of the pseudo-fault register, and executes write/read operations in response to write/read instructions from the system control device, and performs maintenance diagnosis. What is claimed is: 1. A storage device characterized in that the storage device is configured to be able to perform the above operations and also to set a pseudo failure.