JPS6242306B2 - - Google Patents

Info

Publication number
JPS6242306B2
JPS6242306B2 JP55115965A JP11596580A JPS6242306B2 JP S6242306 B2 JPS6242306 B2 JP S6242306B2 JP 55115965 A JP55115965 A JP 55115965A JP 11596580 A JP11596580 A JP 11596580A JP S6242306 B2 JPS6242306 B2 JP S6242306B2
Authority
JP
Japan
Prior art keywords
interrupt
module
input
processor
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55115965A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5741727A (en
Inventor
Toshitaka Hara
Makoto Yamanochi
Satoshi Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11596580A priority Critical patent/JPS5741727A/ja
Publication of JPS5741727A publication Critical patent/JPS5741727A/ja
Publication of JPS6242306B2 publication Critical patent/JPS6242306B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Human Computer Interaction (AREA)
  • Multi Processors (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)
JP11596580A 1980-08-25 1980-08-25 Interruption controlling sysyem Granted JPS5741727A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11596580A JPS5741727A (en) 1980-08-25 1980-08-25 Interruption controlling sysyem

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11596580A JPS5741727A (en) 1980-08-25 1980-08-25 Interruption controlling sysyem

Publications (2)

Publication Number Publication Date
JPS5741727A JPS5741727A (en) 1982-03-09
JPS6242306B2 true JPS6242306B2 (fr) 1987-09-08

Family

ID=14675515

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11596580A Granted JPS5741727A (en) 1980-08-25 1980-08-25 Interruption controlling sysyem

Country Status (1)

Country Link
JP (1) JPS5741727A (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3041863U (ja) * 1997-03-26 1997-10-03 株式会社イシバシヤ 補助アンテナ

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58159172A (ja) * 1982-03-17 1983-09-21 Fujitsu Ltd 多重プロセツサ
JPS60172094A (ja) * 1984-02-17 1985-09-05 株式会社大真空 静電式表示装置の表示情報交換装置
JPS6145305A (ja) * 1984-08-10 1986-03-05 Koike Sanso Kogyo Co Ltd 数値制御用コントロ−ラ
JPS62147045U (fr) * 1986-03-10 1987-09-17
JPS62243058A (ja) * 1986-04-15 1987-10-23 Fanuc Ltd マルチプロセツサシステムの割込制御方法
JPS634363A (ja) * 1986-06-25 1988-01-09 Matsushita Electric Ind Co Ltd マルチｃｐｕ装置
JPH01126751A (ja) * 1987-11-11 1989-05-18 Fujitsu Ltd グルーピング装置
DE3800523A1 (de) * 1988-01-11 1989-07-20 Siemens Ag Datenverarbeitungssystem

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50155149A (fr) * 1974-06-03 1975-12-15

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50155149A (fr) * 1974-06-03 1975-12-15

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3041863U (ja) * 1997-03-26 1997-10-03 株式会社イシバシヤ 補助アンテナ

Also Published As

Publication number Publication date
JPS5741727A (en) 1982-03-09

Similar Documents

Publication Publication Date Title
US4737932A (en) Processor
US4096572A (en) Computer system with a memory access arbitrator
US4271466A (en) Direct memory access control system with byte/word control of data bus
US4261033A (en) Communications processor employing line-dedicated memory tables for supervising data transfers
GB2148563A (en) Multiprocessor system
US4695944A (en) Computer system comprising a data, address and control signal bus which comprises a left bus and a right bus
EP0150767B1 (fr) Arbitration de bus commandée par programme pour système de traitement de données de type à réseau
JPS6242306B2 (fr)
EP0331487B1 (fr) Système pour commander le transfert de données
JPS6215899B2 (fr)
EP0269370B1 (fr) Circuit de commande pour accès en mémoire
JPS6361697B2 (fr)
JPH0227696B2 (ja) Johoshorisochi
JPH0715670B2 (ja) デ−タ処理装置
EP0330110B1 (fr) Dispositif de commande d'accès direct de mémoire
JPS6162961A (ja) 入出力機器
JP2754885B2 (ja) Ｃｐｕ出力データ制御回路
US4330842A (en) Valid memory address pin elimination
JP2705955B2 (ja) 並列情報処理装置
JPH0736806A (ja) Ｄｍａ方式
JPS5844426Y2 (ja) プロセッサ間情報転送装置
JPH0561812A (ja) 情報処理システム
JP2642132B2 (ja) 画像表示システム
JPH0573473A (ja) 産業用コンピユータシステム
JPS58219657A (ja) 記憶装置