JPS6235701B2 - - Google Patents

Info

Publication number
JPS6235701B2
JPS6235701B2 JP57165589A JP16558982A JPS6235701B2 JP S6235701 B2 JPS6235701 B2 JP S6235701B2 JP 57165589 A JP57165589 A JP 57165589A JP 16558982 A JP16558982 A JP 16558982A JP S6235701 B2 JPS6235701 B2 JP S6235701B2
Authority
JP
Japan
Prior art keywords
key code
memory
output port
processor
cpu
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57165589A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5956300A (ja
Inventor
Yoshinobu Tominaga
Mitsuo Sato
Norihito Ikeda
Kazuyuki Oochi
Yoshitoshi Mori
Hiroshi Kuromori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Anritsu Corp
Taiko Electric Works Ltd
Original Assignee
Anritsu Corp
Taiko Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Anritsu Corp, Taiko Electric Works Ltd filed Critical Anritsu Corp
Priority to JP57165589A priority Critical patent/JPS5956300A/ja
Publication of JPS5956300A publication Critical patent/JPS5956300A/ja
Publication of JPS6235701B2 publication Critical patent/JPS6235701B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0763—Error or fault detection not based on redundancy by bit configuration check, e.g. of formats or tags
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/073—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a memory management context, e.g. virtual memory or cache management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)
JP57165589A 1982-09-22 1982-09-22 メモリ−プロテクト方式 Granted JPS5956300A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57165589A JPS5956300A (ja) 1982-09-22 1982-09-22 メモリ−プロテクト方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57165589A JPS5956300A (ja) 1982-09-22 1982-09-22 メモリ−プロテクト方式

Publications (2)

Publication Number Publication Date
JPS5956300A JPS5956300A (ja) 1984-03-31
JPS6235701B2 true JPS6235701B2 (en, 2012) 1987-08-03

Family

ID=15815221

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57165589A Granted JPS5956300A (ja) 1982-09-22 1982-09-22 メモリ−プロテクト方式

Country Status (1)

Country Link
JP (1) JPS5956300A (en, 2012)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6266301U (en, 2012) * 1985-10-14 1987-04-24
JPS62271031A (ja) * 1986-05-20 1987-11-25 Fujitsu Ltd 記憶デ−タ保護方式
JP2951959B2 (ja) * 1988-05-16 1999-09-20 キヤノン株式会社 制御回路のデータ保護方法
JPH03280126A (ja) * 1990-03-29 1991-12-11 Japan Radio Co Ltd データ処理装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS594799B2 (ja) * 1979-03-26 1984-01-31 三菱電機株式会社 メモリ装置

Also Published As

Publication number Publication date
JPS5956300A (ja) 1984-03-31

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