JPS6230349U - - Google Patents
Info
- Publication number
- JPS6230349U JPS6230349U JP1985122918U JP12291885U JPS6230349U JP S6230349 U JPS6230349 U JP S6230349U JP 1985122918 U JP1985122918 U JP 1985122918U JP 12291885 U JP12291885 U JP 12291885U JP S6230349 U JPS6230349 U JP S6230349U
- Authority
- JP
- Japan
- Prior art keywords
- dielectric substrate
- metal base
- fixed
- base block
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 5
- 239000002184 metal Substances 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 4
- 230000005669 field effect Effects 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
Description
第1図はこの考案による半導体装置の一実施例
を示す断面図、第2図は従来の半導体装置の一例
を示す断面図である。
1…電界効果トランジスタ、2a…ゲート電極
、2b…ソース電極、2c…ドレイン電極、3…
半田、4…誘電体基板、5…金属基体ブロツク、
5―1…ソース電極部、6…隙間部。
FIG. 1 is a sectional view showing an embodiment of a semiconductor device according to this invention, and FIG. 2 is a sectional view showing an example of a conventional semiconductor device. DESCRIPTION OF SYMBOLS 1... Field effect transistor, 2a... Gate electrode, 2b... Source electrode, 2c... Drain electrode, 3...
solder, 4... dielectric substrate, 5... metal base block,
5- 1 ...Source electrode part, 6...Gap part.
Claims (1)
が固着され、かつ該金属基体ブロツクをはさんで
誘電体基板が配置固着され、該誘電体基板の表面
に入出力用金属化層が設けられていて、該金属化
層に前記半導体素子の他電極が固着されてなる半
導体装置において、前記金属基体ブロツクと前記
誘電体基板の間に隙間部を設けたことを特徴とす
る半導体装置。 One electrode of a semiconductor element is fixed on a metal base block, a dielectric substrate is placed and fixed across the metal base block, and an input/output metallized layer is provided on the surface of the dielectric substrate. . A semiconductor device in which another electrode of the semiconductor element is fixed to the metallized layer, characterized in that a gap is provided between the metal base block and the dielectric substrate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985122918U JPS6230349U (en) | 1985-08-07 | 1985-08-07 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985122918U JPS6230349U (en) | 1985-08-07 | 1985-08-07 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6230349U true JPS6230349U (en) | 1987-02-24 |
Family
ID=31013555
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1985122918U Pending JPS6230349U (en) | 1985-08-07 | 1985-08-07 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6230349U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01138819A (en) * | 1987-11-26 | 1989-05-31 | Matsushita Electric Works Ltd | Wireless transmitter |
JPH01138820A (en) * | 1987-11-26 | 1989-05-31 | Matsushita Electric Works Ltd | Wireless transmitter |
-
1985
- 1985-08-07 JP JP1985122918U patent/JPS6230349U/ja active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01138819A (en) * | 1987-11-26 | 1989-05-31 | Matsushita Electric Works Ltd | Wireless transmitter |
JPH01138820A (en) * | 1987-11-26 | 1989-05-31 | Matsushita Electric Works Ltd | Wireless transmitter |
JPH0524688B2 (en) * | 1987-11-26 | 1993-04-08 | Matsushita Electric Works Ltd |
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