JPS6134755U - semiconductor equipment - Google Patents

semiconductor equipment

Info

Publication number
JPS6134755U
JPS6134755U JP12071184U JP12071184U JPS6134755U JP S6134755 U JPS6134755 U JP S6134755U JP 12071184 U JP12071184 U JP 12071184U JP 12071184 U JP12071184 U JP 12071184U JP S6134755 U JPS6134755 U JP S6134755U
Authority
JP
Japan
Prior art keywords
semiconductor layer
semiconductor equipment
impurity concentration
gate electrode
field effect
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12071184U
Other languages
Japanese (ja)
Inventor
信 竹内
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP12071184U priority Critical patent/JPS6134755U/en
Publication of JPS6134755U publication Critical patent/JPS6134755U/en
Pending legal-status Critical Current

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Landscapes

  • Junction Field-Effect Transistors (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】 第1図は本考案によるn形GaAsショットキバリアゲ
ート電界効果トランジスタの構造および空乏層の印加電
圧に対する変化状況を示す図、第2図は従来例について
の図である。 1・・・位加電圧対空乏層幅特性、2・・・半導体層厚
さ1、3・・・印加正弦波電圧、4・・・時間T対空乏
層幅t特性、5・・・半絶縁性基板、6・・・半導体層
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram showing the structure of an n-type GaAs Schottky barrier gate field effect transistor according to the present invention and how the depletion layer changes with applied voltage, and FIG. 2 is a diagram of a conventional example. 1... Applied voltage versus depletion layer width characteristic, 2... Semiconductor layer thickness 1, 3... Applied sinusoidal voltage, 4... Time T versus depletion layer width t characteristic, 5... Half Insulating substrate, 6... semiconductor layer.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半絶縁性基板上に設けた半導体層上に、ソース電極とド
レイン電極とショットキバリアゲート電極とを配設した
電界効果トランジスタにおいて、前記半導体層のゲート
電極領域の不純物濃度が一様であり、該不純物濃度と前
記半導体層の厚さとの積を3 X 1012cm−2以
下に設定することを特徴とする半導体装置。
In a field effect transistor in which a source electrode, a drain electrode, and a Schottky barrier gate electrode are disposed on a semiconductor layer provided on a semi-insulating substrate, the impurity concentration in the gate electrode region of the semiconductor layer is uniform; A semiconductor device characterized in that a product of an impurity concentration and a thickness of the semiconductor layer is set to 3×10 12 cm −2 or less.
JP12071184U 1984-08-06 1984-08-06 semiconductor equipment Pending JPS6134755U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12071184U JPS6134755U (en) 1984-08-06 1984-08-06 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12071184U JPS6134755U (en) 1984-08-06 1984-08-06 semiconductor equipment

Publications (1)

Publication Number Publication Date
JPS6134755U true JPS6134755U (en) 1986-03-03

Family

ID=30679524

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12071184U Pending JPS6134755U (en) 1984-08-06 1984-08-06 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS6134755U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05506558A (en) * 1990-06-13 1993-09-22 シーメンス アクチエンゲゼルシヤフト Interdigital transducer with finger width weighting for surface wave devices

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05506558A (en) * 1990-06-13 1993-09-22 シーメンス アクチエンゲゼルシヤフト Interdigital transducer with finger width weighting for surface wave devices

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