JPS6229912B2 - - Google Patents

Info

Publication number
JPS6229912B2
JPS6229912B2 JP56196489A JP19648981A JPS6229912B2 JP S6229912 B2 JPS6229912 B2 JP S6229912B2 JP 56196489 A JP56196489 A JP 56196489A JP 19648981 A JP19648981 A JP 19648981A JP S6229912 B2 JPS6229912 B2 JP S6229912B2
Authority
JP
Japan
Prior art keywords
insulating layer
type
forming
semiconductor
polycrystalline silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56196489A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5897858A (ja
Inventor
Hiroaki Okizaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP56196489A priority Critical patent/JPS5897858A/ja
Publication of JPS5897858A publication Critical patent/JPS5897858A/ja
Publication of JPS6229912B2 publication Critical patent/JPS6229912B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H10D84/0116—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including integrated injection logic [I2L]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Bipolar Integrated Circuits (AREA)
JP56196489A 1981-12-07 1981-12-07 半導体装置の製造方法 Granted JPS5897858A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56196489A JPS5897858A (ja) 1981-12-07 1981-12-07 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56196489A JPS5897858A (ja) 1981-12-07 1981-12-07 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS5897858A JPS5897858A (ja) 1983-06-10
JPS6229912B2 true JPS6229912B2 (enrdf_load_stackoverflow) 1987-06-29

Family

ID=16358624

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56196489A Granted JPS5897858A (ja) 1981-12-07 1981-12-07 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS5897858A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPS5897858A (ja) 1983-06-10

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