JPS6228591B2 - - Google Patents

Info

Publication number
JPS6228591B2
JPS6228591B2 JP5982880A JP5982880A JPS6228591B2 JP S6228591 B2 JPS6228591 B2 JP S6228591B2 JP 5982880 A JP5982880 A JP 5982880A JP 5982880 A JP5982880 A JP 5982880A JP S6228591 B2 JPS6228591 B2 JP S6228591B2
Authority
JP
Japan
Prior art keywords
oxide film
temperature
gate electrode
low
polycrystalline silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP5982880A
Other languages
English (en)
Japanese (ja)
Other versions
JPS56157024A (en
Inventor
Junji Sakurai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP5982880A priority Critical patent/JPS56157024A/ja
Publication of JPS56157024A publication Critical patent/JPS56157024A/ja
Publication of JPS6228591B2 publication Critical patent/JPS6228591B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Electrodes Of Semiconductors (AREA)
JP5982880A 1980-05-06 1980-05-06 Manufacture of semiconductor device Granted JPS56157024A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5982880A JPS56157024A (en) 1980-05-06 1980-05-06 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5982880A JPS56157024A (en) 1980-05-06 1980-05-06 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS56157024A JPS56157024A (en) 1981-12-04
JPS6228591B2 true JPS6228591B2 (zh) 1987-06-22

Family

ID=13124470

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5982880A Granted JPS56157024A (en) 1980-05-06 1980-05-06 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS56157024A (zh)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0652733B2 (ja) * 1985-06-04 1994-07-06 日本電気株式会社 半導体装置の製造法
US5028554A (en) * 1986-07-03 1991-07-02 Oki Electric Industry Co., Ltd. Process of fabricating an MIS FET
US4855247A (en) * 1988-01-19 1989-08-08 Standard Microsystems Corporation Process for fabricating self-aligned silicide lightly doped drain MOS devices
DE69132695T2 (de) * 1990-05-11 2002-06-13 Koninkl Philips Electronics Nv CMOS-Verfahren mit Verwendung von zeitweilig angebrachten Siliciumnitrid-Spacern zum Herstellen von Transistoren (LDD) mit leicht dotiertem Drain
US5089432A (en) * 1990-08-17 1992-02-18 Taiwan Semiconductor Manufacturing Company Polycide gate MOSFET process for integrated circuits
US7829411B2 (en) * 2002-02-01 2010-11-09 Nxp B.V. Method and device to form high quality oxide layers of different thickness in one processing step
CN102299064B (zh) * 2010-06-28 2013-03-27 中芯国际集成电路制造(上海)有限公司 栅结构氧化的方法

Also Published As

Publication number Publication date
JPS56157024A (en) 1981-12-04

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