JPS62247555A - 半導体素子搭載ピングリットアレイパッケージ基板の製造方法 - Google Patents

半導体素子搭載ピングリットアレイパッケージ基板の製造方法

Info

Publication number
JPS62247555A
JPS62247555A JP61091000A JP9100086A JPS62247555A JP S62247555 A JPS62247555 A JP S62247555A JP 61091000 A JP61091000 A JP 61091000A JP 9100086 A JP9100086 A JP 9100086A JP S62247555 A JPS62247555 A JP S62247555A
Authority
JP
Japan
Prior art keywords
conductor
pin
array package
grid array
pin grid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61091000A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0582978B2 (cg-RX-API-DMAC10.html
Inventor
Koichi Izumi
泉　光一
Hironori Takenaka
裕紀 竹中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP61091000A priority Critical patent/JPS62247555A/ja
Publication of JPS62247555A publication Critical patent/JPS62247555A/ja
Publication of JPH0582978B2 publication Critical patent/JPH0582978B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10W70/635—
    • H10W70/60—
    • H10W70/655—

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
JP61091000A 1986-04-18 1986-04-18 半導体素子搭載ピングリットアレイパッケージ基板の製造方法 Granted JPS62247555A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61091000A JPS62247555A (ja) 1986-04-18 1986-04-18 半導体素子搭載ピングリットアレイパッケージ基板の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61091000A JPS62247555A (ja) 1986-04-18 1986-04-18 半導体素子搭載ピングリットアレイパッケージ基板の製造方法

Publications (2)

Publication Number Publication Date
JPS62247555A true JPS62247555A (ja) 1987-10-28
JPH0582978B2 JPH0582978B2 (cg-RX-API-DMAC10.html) 1993-11-24

Family

ID=14014231

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61091000A Granted JPS62247555A (ja) 1986-04-18 1986-04-18 半導体素子搭載ピングリットアレイパッケージ基板の製造方法

Country Status (1)

Country Link
JP (1) JPS62247555A (cg-RX-API-DMAC10.html)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03123065A (ja) * 1989-10-04 1991-05-24 Nec Kyushu Ltd 半導体装置用パッケージ
JP2002246717A (ja) * 2001-02-21 2002-08-30 Kyocera Corp セラミック回路基板
JP2008277526A (ja) * 2007-04-27 2008-11-13 Shinko Electric Ind Co Ltd ピン付き基板およびその製造方法ならびに半導体製品

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5040718A (cg-RX-API-DMAC10.html) * 1973-05-17 1975-04-14
JPS5670650U (cg-RX-API-DMAC10.html) * 1979-10-31 1981-06-11
JPS5982757A (ja) * 1982-11-04 1984-05-12 Toshiba Corp 半導体用ステムおよびその製造方法
JPS6113938U (ja) * 1984-06-30 1986-01-27 イビデン株式会社 プラグインパツケ−ジ基板

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5040718A (cg-RX-API-DMAC10.html) * 1973-05-17 1975-04-14
JPS5670650U (cg-RX-API-DMAC10.html) * 1979-10-31 1981-06-11
JPS5982757A (ja) * 1982-11-04 1984-05-12 Toshiba Corp 半導体用ステムおよびその製造方法
JPS6113938U (ja) * 1984-06-30 1986-01-27 イビデン株式会社 プラグインパツケ−ジ基板

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03123065A (ja) * 1989-10-04 1991-05-24 Nec Kyushu Ltd 半導体装置用パッケージ
JP2002246717A (ja) * 2001-02-21 2002-08-30 Kyocera Corp セラミック回路基板
JP2008277526A (ja) * 2007-04-27 2008-11-13 Shinko Electric Ind Co Ltd ピン付き基板およびその製造方法ならびに半導体製品
US8188589B2 (en) 2007-04-27 2012-05-29 Shinko Electric Industries Co., Ltd. Substrate with pin, manufacturing method thereof, and semiconductor product
TWI469277B (zh) * 2007-04-27 2015-01-11 新光電氣工業股份有限公司 具插針之基板，半導體封裝之製造方法，及半導體產品

Also Published As

Publication number Publication date
JPH0582978B2 (cg-RX-API-DMAC10.html) 1993-11-24

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