JPS6224650A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS6224650A JPS6224650A JP60161952A JP16195285A JPS6224650A JP S6224650 A JPS6224650 A JP S6224650A JP 60161952 A JP60161952 A JP 60161952A JP 16195285 A JP16195285 A JP 16195285A JP S6224650 A JPS6224650 A JP S6224650A
- Authority
- JP
- Japan
- Prior art keywords
- pellet
- semiconductor device
- film sheet
- bonding
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
【発明の詳細な説明】
［技術分野］
本発明は半導体装置、特に封止されたペレットの防湿技
術および電子線対策技術に適用して有効な技術に関する
。DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a technique that is effective when applied to a semiconductor device, particularly a moisture-proofing technique for a sealed pellet and a technique for protecting against electron beams.
［背景技術］
半導体装置、特にペレットをエポキシ樹脂等の合成樹脂
で封止してなる半導体装置では、パッケージ内部へ水分
が侵入しやすい、そのため、パッド部分が腐食し易く、
断線もしくは電気特性の劣化等が生しる場合のあること
が知られている。[Background Art] In semiconductor devices, particularly in semiconductor devices formed by sealing pellets with synthetic resin such as epoxy resin, moisture easily enters the inside of the package, and as a result, pad portions are susceptible to corrosion.
It is known that disconnection or deterioration of electrical characteristics may occur.
一方、封止材である合成樹脂に含存されているα線等の
電子線が原因となってペレットの誤動作を住じる場合の
あることも知られている。On the other hand, it is also known that electron beams such as alpha rays contained in the synthetic resin that is the sealing material may cause malfunction of the pellet.
上記二つの問題に対しては、各々以下のような対策を行
うことが考えられる。The following measures may be taken to address the above two problems.
すなわち、防湿対策としては、ペレットの周囲にシリコ
ーンゲルの如き防湿材をポッティングすることが考えら
れる。That is, as a moisture-proofing measure, potting a moisture-proofing material such as silicone gel around the pellets may be considered.
また、電子線の対策としてはベレー／ 上表面にポリイ
ミド樹脂等を被着することが考えられる。Additionally, as a countermeasure against electron beams, it is possible to cover the beret/upper surface with polyimide resin or the like.
しかし、各々の問題点は上記の対策によりそれぞれ解決
できたとしても、一つの半導体装置で防湿対策と電子線
対策の両者が行われなければ半導体装置のイ３頼性を向
上させることにはならないことが本発明者により見い出
された。However, even if each of the problems could be solved by the above-mentioned measures, it would not be possible to improve the reliability of the semiconductor device unless both moisture-proofing and electron beam countermeasures were taken in the same semiconductor device. This was discovered by the present inventor.
この点について、まず電子線対策としてペレットの表面
にポリイミド樹脂を被着させ、その後に防湿対策として
シリコーンゲルを前記ポリイミド樹脂上にポツティング
することも考えられるが、この方法ではポッティングし
たシリコーンゲルがペレット上から流れてしまい、十分
な防湿効果を発揮できないことがさらに本発明者によっ
て明らかにされた。Regarding this point, it may be possible to first cover the surface of the pellet with polyimide resin as a countermeasure against electron beams, and then to pot silicone gel on the polyimide resin as a moisture-proof measure, but in this method, the potted silicone gel The inventor further clarified that the moisture-proofing effect cannot be exerted sufficiently because the moisture flows from above.
なお、樹脂封止型の半導体装置の技術として詳しく述べ
である例としては、株式会社工業調査会、１９８０年１
月１５日発行ｒｌｃ化実装技術」（日本マイクロエレク
トロニクス協会［）、ＰＩ３７〜Ｐ１３９がある。For a detailed example of the technology of resin-sealed semiconductor devices, see Kogyo Kenkyukai Co., Ltd., 1980, 1.
"RLC Mounting Technology" (Japan Microelectronics Association [), published on May 15th, PI37-P139.
［発明の目的］
本発明の目的は、耐湿性に優れ、しかも電子線の影響を
受けにくい半導体装置を提供することにある。[Object of the Invention] An object of the present invention is to provide a semiconductor device that has excellent moisture resistance and is less susceptible to the effects of electron beams.
本発明の他の目的は、電気的に信頼性の高い半導体装置
を提供することにある。Another object of the present invention is to provide a semiconductor device with high electrical reliability.
本発明の前記ならびにその他の目的と新規な特徴は、本
明細書の記述および添付図面から明らかにであろう。The above and other objects and novel features of the present invention will be apparent from the description herein and the accompanying drawings.
［発明の概要］
本願において開示される発明のうち代表的なものの概要
を簡単に説明すれば、次の通りである。[Summary of the Invention] A brief overview of typical inventions disclosed in this application is as follows.
すなわち、ペレットの表面のボンディングパッド部にの
み防湿用樹脂が被着され、その他のペレット表面には電
子線保護材が被着された構造の半導体装置とすることに
よって、腐食し易いポンディングバンドとワイヤの接合
部を水分の侵入から保護することができ、しかも他のペ
レット表面は電子線から保護することが可能となる。In other words, by creating a semiconductor device with a structure in which moisture-proofing resin is coated only on the bonding pad portion on the surface of the pellet, and electron beam protection material is coated on the other pellet surfaces, the bonding band, which is easily corroded, can be avoided. The wire joints can be protected from moisture intrusion, and the other pellet surfaces can be protected from electron beams.
これにより、電気的に信頼性の高い半導体装置を提供す
ることができる。Thereby, a semiconductor device with high electrical reliability can be provided.
［実施例１］
第１図は本発明の一実施例である半導体装置の全体を示
す断面図、第２図はペレットの部分を示す部分平面図、
第３図はペレット表面の拡大部分断面図である。[Example 1] FIG. 1 is a cross-sectional view showing the entire semiconductor device which is an example of the present invention, FIG. 2 is a partial plan view showing the pellet part,
FIG. 3 is an enlarged partial sectional view of the pellet surface.
本実施例１の半導体装置１は、いわゆるディアルインラ
インパッケージ（Ｄ Ｉ Ｐ）形状の樹脂封止型半導体
装置であり、タブ２上に取付けられたペレット３と、ペ
レット３とワイヤ４を介して電気的に接続された外部端
子としてのリード５とがエポキシ樹脂等の封止材６によ
り封止されてなるものである。The semiconductor device 1 of the first embodiment is a resin-sealed semiconductor device in the shape of a so-called dual in-line package (DIP). Leads 5 as external terminals connected to each other are sealed with a sealing material 6 such as epoxy resin.
本実施例１のペレット３の表面は第２図および第３図に
示すようにポンディングバンド７の部分を除いてペレッ
ト３の表面にポリイミド樹脂８が被着されている。また
、ボンディングパッド７の部分には該パッド７とワイヤ
４の接続部分にシリコーンゲル９が被着されている。As shown in FIGS. 2 and 3, the surface of the pellet 3 of Example 1 is coated with polyimide resin 8 except for the portion of the bonding band 7. Furthermore, a silicone gel 9 is applied to the bonding pad 7 at the connection portion between the pad 7 and the wire 4 .
この半導体装置ｌの製造方法について説明すると概ね以
下の通りである。The method for manufacturing this semiconductor device 1 will be roughly explained as follows.
すなわち、まず前記のリード５およびタブ２が連結され
た状態のリードフレーム（図示せず）が用意される。こ
のリードフレームはたとえば、４２７０イもしくはコバ
ール等からなる金属シートにプレスもしくはエツチング
等の加工処理を施して所定形状に形成されて得られるも
のである。That is, first, a lead frame (not shown) with the leads 5 and tabs 2 connected thereto is prepared. This lead frame is obtained by processing a metal sheet made of, for example, 4270 mm or Kovar into a predetermined shape by processing such as pressing or etching.
このリードフレームのタブ２の上に、シリコン半導体か
らなるペレット３を金−シリコン共晶法によって取付け
る。A pellet 3 made of silicon semiconductor is attached onto the tab 2 of this lead frame by the gold-silicon eutectic method.
次に、ペレット３の表面と略同じ大きさのポリイミド樹
脂からなるフィルムシート８を、ぺＬ／ ソト３の表面
にシリコン系の接着剤１０を用いて被着させる。このと
き、第２図に示すようにフィルムシート８にはペレット
３のボンディングパッド７に当接する部分に孔８ａが開
設されている。したがって、ペレット３の上にフィルム
シート８を被着したときには、ポンディングバンド７の
部分はフィルムシート８の孔８ａの底部で外部に露出し
た状態となっている。Next, a film sheet 8 made of polyimide resin having approximately the same size as the surface of the pellet 3 is adhered to the surface of the pellet 3 using a silicone adhesive 10. At this time, as shown in FIG. 2, holes 8a are formed in the film sheet 8 at the portions that contact the bonding pads 7 of the pellets 3. Therefore, when the film sheet 8 is placed on the pellet 3, the portion of the bonding band 7 is exposed to the outside at the bottom of the hole 8a of the film sheet 8.
次に、フィルムシート８の孔８ａの底部に露出したポン
ディングバンド７とインナーリード５ａとを電気的に接
続するワイヤポンディングが行われる。Next, wire bonding is performed to electrically connect the bonding band 7 exposed at the bottom of the hole 8a of the film sheet 8 and the inner lead 5a.
このワイヤポンディングは例えば、ワイヤ４の一端を加
熱して溶融ボールを形成した後に、このボール部分を前
記孔８ａの底部にあるボンディングパッド７に圧着して
第一ボンディングを行う。In this wire bonding, for example, one end of the wire 4 is heated to form a molten ball, and then this ball portion is pressed onto the bonding pad 7 at the bottom of the hole 8a to perform first bonding.
次に、ワイヤ４の長さを所定を確保してループを形成し
た後に加熱条件下でワイヤ４の他端部分を超音波振動を
印加しながらインナーリード５ａの所定位置に押圧して
第二ボンディングを行うことによりなされるものである
。Next, after securing a predetermined length of the wire 4 and forming a loop, the other end of the wire 4 is pressed to a predetermined position of the inner lead 5a under heating conditions while applying ultrasonic vibration to perform second bonding. This is done by doing the following.
このようにワイヤボンディングを行った後に、前記フィ
ルムシート８に形成された孔８ａにシリコーンゲル９を
ポッティングして、ボンディングパッド７とワイヤ４の
接合部分をシリコーンゲル９で覆う。After wire bonding is performed in this manner, silicone gel 9 is potted into the hole 8a formed in the film sheet 8, and the bonding portion between the bonding pad 7 and the wire 4 is covered with the silicone gel 9.
このとき、シリコーンゲル９はフィルムシート８に形成
された孔８ａの内部にポツティングされるため、液状の
シリコーンゲル９がペレット３の表面から流れ出すこと
はなく、しかも腐食しやすいボンディングパッド７とワ
イヤ４の接合部にのみポツティングすることができる。At this time, since the silicone gel 9 is potted inside the hole 8a formed in the film sheet 8, the liquid silicone gel 9 does not flow out from the surface of the pellet 3, and moreover, the bonding pad 7 and wire 4, which are easily corroded, are prevented from flowing out from the surface of the pellet 3. Can only be potted at the joint of the
その後、上記リードフレームはペレット３およびワイヤ
４を覆う部分がエポキシ樹脂等の封止材６によりモール
ドされ、さらにパッケージ本体（封止材６）から突出し
たアウターリード５ｂの部分が切断・成形されて本実施
例の半導体装置ｌを得ることができる。Thereafter, the portion of the lead frame that covers the pellet 3 and wire 4 is molded with a sealing material 6 such as epoxy resin, and the portion of the outer lead 5b that protrudes from the package body (sealing material 6) is cut and molded. The semiconductor device 1 of this example can be obtained.
このように、本実施例１によれば、ペレット３の表面は
電子線遮蔽効果のあるポリイミド樹脂のフィルムシート
８により覆われている。そのため、封止材６の成分中に
含まれているα線等の影響を抑制してペレット３の誤動
作を効果的に防止することができる。As described above, according to the first embodiment, the surface of the pellet 3 is covered with the polyimide resin film sheet 8 which has an electron beam shielding effect. Therefore, it is possible to suppress the influence of α rays and the like contained in the components of the sealing material 6, and effectively prevent malfunction of the pellet 3.
また、水分の侵入により腐食しゃすいボンディングパッ
ド７とワイヤ４の接合部分には耐湿性の高いシリコーン
ゲル９がポッティングされている。Furthermore, a highly moisture-resistant silicone gel 9 is potted at the joint between the bonding pad 7 and the wire 4, which is susceptible to corrosion due to moisture intrusion.
そのため、接合部分でのワイヤ４の腐食による電気抵抗
の増大もしくは断線を効果的に防止することができる。Therefore, an increase in electrical resistance or wire breakage due to corrosion of the wire 4 at the joint portion can be effectively prevented.
［実施例２］
第４図は本発明の他の実施例である半導体装置のペレ７
）部分を示す拡大部分断面図である。[Embodiment 2] FIG. 4 shows a semiconductor device according to another embodiment of the present invention.
) is an enlarged partial sectional view showing the portion.
本実施例２の半導体装置は実施例１で説明した半導体装
置と略同様のものであるが、ペレット表面の構造が異な
るものである。The semiconductor device of Example 2 is substantially the same as the semiconductor device described in Example 1, but the structure of the pellet surface is different.
すなわち、本実施例２ではポリイミド樹脂層２８が接着
剤等を用いることなく直接ペレット３の表面に被着され
ている。That is, in Example 2, the polyimide resin layer 28 is directly adhered to the surface of the pellet 3 without using an adhesive or the like.
すなわち、本実施例２では、ペレット３の分割前のウェ
ハ処理の段階でポリイミド樹脂層２８が形成されたもの
である。このポリイミド樹脂層２８の形成は、たとえば
、ウェハ表面にレジスト材を塗布してエツチング処理を
行うことにより所定部分のレジスト材を除去してウェハ
上に所定形状のパターンを形成する。次に、ポリイミド
樹脂層２８を被着してレジスト材を除去することにより
各ペレット３上のボンディングパッド部分７を除いた部
分にのみポリイミド樹脂Ｎ２８を形成することができる
。That is, in Example 2, the polyimide resin layer 28 was formed at the stage of wafer processing before the pellets 3 were divided. The polyimide resin layer 28 is formed by, for example, applying a resist material to the wafer surface and performing an etching process to remove a predetermined portion of the resist material to form a pattern of a predetermined shape on the wafer. Next, by depositing the polyimide resin layer 28 and removing the resist material, the polyimide resin N28 can be formed only on the portions of each pellet 3 excluding the bonding pad portions 7.
このようにして、予めウェハ処理の段階でポリイミド樹
脂ｊｌｉＦ２Ｂを形成した後にウェハを各ペレット３毎
に分割して、その後は実施例１と同様の工程を行うこと
により、実施例１で説明した半導体装置ｌと同様、誤動
作を防止して耐湿性の高い半導体装置を提供することが
できる。In this way, after forming the polyimide resin jliF2B in advance at the wafer processing stage, the wafer is divided into pellets 3, and then the same steps as in Example 1 are performed, thereby producing the semiconductor described in Example 1. Similar to device 1, it is possible to provide a semiconductor device that prevents malfunctions and has high moisture resistance.
本実施例２では以上のように、すなわちポリイミド樹脂
Ｎ２Ｂの形成がウェハの処理工程において複数のペレッ
ト３上で一括して行うことができるため、効率的なポリ
イミド樹脂Ｎ２Ｂの被着を行うことができる。In Example 2, as described above, the polyimide resin N2B can be formed on a plurality of pellets 3 at once in the wafer processing process, so that the polyimide resin N2B can be efficiently deposited. can.
［効果］
（１）、ペレットの表面のボンディングパッド部にのみ
防湿用樹脂が被着され、その他のペレット表面には電子
線保護材が被着された構造の半導体装置とすることによ
って、ボンディングパッドとワイヤの接合部の腐食を防
止することができ、しかも他のペレット表面は電子線か
ら保護することが可能となる。[Effects] (1) By creating a semiconductor device with a structure in which moisture-proofing resin is coated only on the bonding pad portion on the surface of the pellet, and electron beam protection material is coated on the other pellet surfaces, the bonding pad Corrosion can be prevented at the joints between the pellets and the wires, and the other pellet surfaces can be protected from electron beams.
（２）、ペレット表面にボンディングパッド部に当接す
る部位に孔の形成されているポリイミド樹脂を被着する
ことにより、シリコーンゲルをポッティングした際にシ
リコーンゲルの流出を防止することができる。(2) By covering the pellet surface with a polyimide resin having holes formed in the portion that contacts the bonding pad portion, it is possible to prevent the silicone gel from flowing out when the silicone gel is potted.
（３）、上記（１）および（２）により、耐湿性および
電子線の遮蔽に優れた半導体装置を提供できるため、半
導体装置の信頼性を向上させることができる。(3) According to (1) and (2) above, it is possible to provide a semiconductor device with excellent moisture resistance and electron beam shielding, thereby improving the reliability of the semiconductor device.
（４）、ポリイミド樹脂の被着をウェハの処理工程で行
うことにより、効率的な被着作業を行うことができる。(4) By performing the deposition of polyimide resin during the wafer processing process, efficient deposition work can be performed.
以上本発明者によってなされた発明を実施例に基づき具
体的に説明したが、本発明は前記実施例に限定されるも
のではなく、その要旨を逸脱しない範囲で種々変更可能
であることはいうまでもない。Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the Examples and can be modified in various ways without departing from the gist thereof. Nor.
たとえば、実施例１ではポリイミド樹脂からなるフィル
ムシートの被着をペレット毎に行った場合について説明
したが、これに限らすウェハの段階でフィルムシートを
被着した後に各ペレット毎に分割してもよい。For example, in Example 1, a case was described in which a film sheet made of polyimide resin was applied to each pellet, but this is not limited to this.It is also possible to apply a film sheet at the wafer stage and then divide it into individual pellets. good.
また、ペレットのタブへの接合方法としては金−シリコ
ン共晶法による場合についてのみ説明したが、これに限
らず、銀ペースト等のろう材を用いて接合したものであ
ってもよい。In addition, although the method for joining the pellet to the tab has been described only using the gold-silicon eutectic method, the method is not limited thereto, and joining may be performed using a brazing material such as silver paste.
さらに、実施例では電子線遮蔽物質としてポリイミド樹
脂、耐湿性樹脂としてシリコーンゲルについてのみ説明
したが、これに限らず上記の性質を有する物質であれば
いかなるものであってもよい。Further, in the embodiments, polyimide resin is used as the electron beam shielding material, and silicone gel is used as the moisture-resistant resin.
【図面の簡単な説明】
第１図は本発明の実施例１の半導体装置の全体を示す断
面図、
第２図は実施例１の半導体装置のペレットの部分を示す
部分平面図、
第３図は実施例１の半導体装置のペレット部分の拡大部
分断面図、
第４図は実施例２の半導体装置のペレット部分の拡大部
分断面図である。
１・・・半導体装置、２・・・タブ、３・・・ペレット
、４・・・ワイヤ、５・・・リード、５ａ・・・インナ
ーリード、５ｂ・・・アウターリード、６・・・封止材
（エポキシ樹脂）、７・・・ワイヤ、８・・・フィルム
シート（ポリイミドＨｆ脂） 、８ ａ・・・孔、９・
・・シリコーンゲル、１０・・・接着剤、２８・・・ポ
リイミド樹脂層。
第 ２ 図[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a sectional view showing the entire semiconductor device of Example 1 of the present invention, FIG. 2 is a partial plan view showing the pellet portion of the semiconductor device of Example 1, and FIG. 3 is an enlarged partial sectional view of the pellet portion of the semiconductor device of Example 1, and FIG. 4 is an enlarged partial sectional view of the pellet portion of the semiconductor device of Example 2. DESCRIPTION OF SYMBOLS 1...Semiconductor device, 2...Tab, 3...Pellet, 4...Wire, 5...Lead, 5a...Inner lead, 5b...Outer lead, 6...Sealing Stopping material (epoxy resin), 7... Wire, 8... Film sheet (polyimide Hf resin), 8 a... Hole, 9...
... Silicone gel, 10 ... Adhesive, 28 ... Polyimide resin layer. Figure 2
Claims (1)
にのみ防湿用樹脂が被着され、その他のペレット表面に
は電子線保護材が被着されていることを特徴とする半導
体装置。 ２、電子線保護材がシート状のポリイミド樹脂であり、
このポリイミド樹脂のボンディングパッドに当接する位
置に開設された孔部に防湿用樹脂としてのシリコーンゲ
ルがポッティングされてなることを特徴とする特許請求
の範囲第１項記載の半導体装置。 ３、封止が合成樹脂でなされたことを特徴とする特許請
求の範囲第１項記載の半導体装置。[Claims] 1. A moisture-proofing resin is applied only to the bonding pad portion on the surface of the sealed pellet, and an electron beam protection material is applied to the other surfaces of the pellet. Semiconductor equipment. 2. The electron beam protection material is a sheet-shaped polyimide resin,
2. The semiconductor device according to claim 1, wherein a silicone gel as a moisture-proofing resin is potted into a hole formed at a position in contact with the bonding pad of the polyimide resin. 3. The semiconductor device according to claim 1, wherein the sealing is made of synthetic resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60161952A JPS6224650A (en) | 1985-07-24 | 1985-07-24 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60161952A JPS6224650A (en) | 1985-07-24 | 1985-07-24 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6224650A true JPS6224650A (en) | 1987-02-02 |
Family
ID=15745170
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60161952A Pending JPS6224650A (en) | 1985-07-24 | 1985-07-24 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6224650A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5047834A (en) * | 1989-06-20 | 1991-09-10 | International Business Machines Corporation | High strength low stress encapsulation of interconnected semiconductor devices |
| US5539250A (en) * | 1990-06-15 | 1996-07-23 | Hitachi, Ltd. | Plastic-molded-type semiconductor device |
| JP2013197531A (en) * | 2012-03-22 | 2013-09-30 | Sharp Corp | Semiconductor device and manufacturing method of the same |
| JP2016195292A (en) * | 2016-08-25 | 2016-11-17 | シャープ株式会社 | Semiconductor device and method of manufacturing the same |
-
1985
- 1985-07-24 JP JP60161952A patent/JPS6224650A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5047834A (en) * | 1989-06-20 | 1991-09-10 | International Business Machines Corporation | High strength low stress encapsulation of interconnected semiconductor devices |
| US5539250A (en) * | 1990-06-15 | 1996-07-23 | Hitachi, Ltd. | Plastic-molded-type semiconductor device |
| JP2013197531A (en) * | 2012-03-22 | 2013-09-30 | Sharp Corp | Semiconductor device and manufacturing method of the same |
| JP2016195292A (en) * | 2016-08-25 | 2016-11-17 | シャープ株式会社 | Semiconductor device and method of manufacturing the same |
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