JPS62245650A - Manufacture of multilayer interconnection structure - Google Patents

Abstract

PURPOSE:To contrive improvement in the effect of cleaning, to reduce the resistance of a through hole, and to obtain a microscopic multilayer interconnection structure by a method wherein polyimide resin is covered by the mask to be used for dry etching when a sputtering etching is performed. CONSTITUTION:The first layer of Al wiring, to be used for the lower electrode 3 to be connected in low resistance to the diffusion layer of a circuit element, is formed on the surface oxide film 2 of an Si semiconductor substrate 1. An interlayer insulating film 4 of polyimide resin is formed on the electrode 3. Besides, an Al thin film 5 of the prescribed thickness is formed on the surface of the film 4 as the mask to be used for dry etching. A patterning is performed by dry etching using a photoresist 6 on the thin film 5 and also using O2 gas on the part 7 for window to be used to perforate a through hole 8 on the electrode 3. When a dry etching is performed, the thin film 5 of polyimide resin is used as the mask for the dry etching, the cleaning to be conducted after dry etching is effectively performed, and the resistance of the through hole 8 can be reduced.

Description

[Detailed Description of the Invention] [Industrial Field of Application] The present invention is directed to the use of an organic film as an interlayer insulating film (・lower electrode (
This invention relates to a method for manufacturing a multilayer wiring structure in which electrically conductive through-holes are formed between wires (wirings) and upper electrodes (wirings), and in particular, methods for manufacturing semiconductor integrated circuit devices (ICs, LSIs) having minute through-holes. This invention relates to electrode formation technology that is effective when applied to.

[Prior art]

A multilayer aluminum interconnection technique using an organic film such as a polyimide resin as an interlayer insulating film is described in Japanese Unexamined Patent Publication No. 55-59741 filed by the present applicant.

The outline is that after forming a polyimide resin film as an interlayer insulating film on the lower It electrode, through holes are made in the necessary parts of the insulating film to obtain electrical continuity with the upper A and 6 electrodes. This through-hole part is etched in a vacuum state by slatting, and then the metal (A4) for forming the upper AA electrode is continuously etched without breaking the vacuum.
This removes contaminants in the through hole due to organic substances generated from the polyimide resin during through hole etching, thereby keeping the through hole resistance low.

[Problem that the invention seeks to solve]

In the conventional method described above, referring to FIGS. 1 to 3 and 6 to 8, when etching through holes in the polyimide resin film 4 formed on the lower Aa electrode 3 (FIG. 1), The surface of the polyimide resin film 4 is coated with a Si-based inorganic thin film 5 as a mask for dry etching (Fig. 2).
The polyimide resin film 4 is dry-etched through the window opening pattern of this dry-etching mask 5 (Fig. 3), and then the dry-etching mask 5 is exposed to a CF-based gas or H
Remove using F-based etchant (Fig. 6), then remove A.
While performing sputter etching (cleaning) with r gas (FIG. 7), A stone sputtering for the upper A and six electrodes 9 is performed (FIG. 8).

However, according to the above method, since the side surface of the polyimide resin film 5 inside the through hole 8 is etched during sputter etching, gas is generated, sputter cleaning is insufficient, and the through hole resistance It has become clear that the reduction effect is not sufficient. Also,
Another problem was that the process from through-hole dry etching to A and 6 sputtering was not consistent and required a large number of steps.

The present invention has been made to overcome the above-mentioned problems. Therefore, one object of the present invention is to provide a method for forming multilayer wiring using an organic interlayer insulating film, which can reduce conduction resistance even in minute through holes.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means for solving problems]

A brief overview of typical inventions disclosed in this application is as follows.

That is, a first layer wiring is formed on one main surface of the base, an organic film is formed by embedding the wiring thereon to serve as an interlayer insulating film, and AA is used as a dry etching mask on the organic film.
Form a thin (aluminum) film, dry-etch the organic film through this dry-etching mask to create a through hole that reaches the first layer wiring, and then sputter with the dry-etching mask left in place. By performing etching, the contaminants in the through holes are removed, leaving the Ak thin film as a mask for the dry etching, and sputtering AA, which is the wiring material for the second layer wiring, on top of it. be.

[Effect]

According to the above-mentioned means, since the polyimide resin is covered with a dry etching mask during sputter etching, the cleaning efficiency is improved and the through-hole conduction resistance is reduced. The adhesion between the glabella insulating film and the glabellar insulating film is strengthened, and the process is simplified, thereby achieving the above object.

〔Example〕

1 to 5 show an embodiment of the present invention, and are cross-sectional views of main parts in a two-layer wiring structure process using polyimide resin as an interlayer insulating film. Each step will be explained in detail below.

(1) A circuit element is formed on the surface of a semiconductor substrate 1, for example, a Si semiconductor, by a well-known selective diffusion technique, and a lower layer electrode is formed on the surface oxide film 2 to connect the diffusion layer of the circuit element with low resistance. The first layer A4 wiring (electrode) 3 is formed by vapor deposition (sputtering) of An aluminum (for aluminum) and patterning using a photoresist mask. This human p wiring is made of Al containing 2% Si, for example, and the thickness of the AP is about 1 μm. On top of this, a polyimide resin, for example, a high molecular polymer such as polyimide isoindoroquinazolinedione, is applied as an interlayer insulating film 4 using a spinner, and baked at a high temperature of 300 to 400C to a thickness of about 2 μm after quenching. Form. A for dry etching mask on the surface of this polyimide resin.
6 (aluminum) is deposited (or sputtered) to a thickness of 1
An Al thin film 5 having a thickness of 000 OA or more is formed (FIG. 1).

(2) The AA thin film 5 for the dry etching mask is dry-etched using an O7 gas to form a through-hole portion 7 on the second layer A4 wiring 2 using a photoresist mask 6. Patterning is done by (
Figure 2).

(3) Dry-etch the polyimide resin using the dry-etching mask described above to open through holes 8.

(4) In the conventional process, a step of removing the dry etching mask is included here, but in the present invention, this removing step is eliminated, and the dry etching mask 5 is left as it is in the same sputtering apparatus. (Gas pressure 5 x
Sputter cleaning (sputter etch) is performed at 10-3 cWLTorr (Figure 4).

This sputter cleaning is performed only to remove organic contaminants generated from the polyimide resin during the dry etching in the through holes 8, but at the same time, the AA thin film serving as a dry etching mask is not completely removed.

(5) After cleaning, without exposing the surface of the lower electrode of the cleaned through-hole to the atmosphere, AB is quickly and continuously sputtered to cover the entire surface with A/? A film is formed and finally patterned using a photoresist mask to form the second layer A4 wiring (
Upper electrode) 9 is formed.

In the process described in the above example, the polyimide resin is covered with a dry etch mask during sputter cleaning, so it is not etched, and therefore the organic matter emitted from the polyimide resin does not contaminate the inside of the through hole. This makes it possible to reduce the through-hole resistance, and also to omit the step of removing the dry etching mask, which simplifies the process.

In addition to Ap, a Si-based inorganic film such as SiN or Sin can be used as a dry-etching mask for etching polyimide resin. However, the thermal consistency and adhesion are not necessarily good, and if the second layer wiring is left as is on the glabella insulating film after through-hole etching, there is a risk that the second layer wiring will peel off from the interlayer insulating film. However, in the case of A2, which was left as a dry-etching mask, it bonded well with the polyimide resin and there was no risk of peeling.
Moisture resistance and strength can be ensured in multilayer wiring structures.

Although the invention made by the present invention has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the above-mentioned Examples and can be modified in various ways without departing from the gist thereof. do not have.

The present invention can be applied to all ICs having a multilayer wiring structure using polyimide resin for the glabellar membrane.

〔Effect of the invention〕

Among the inventions disclosed in this application, the effects obtained by typical inventions are briefly explained below.

That is, through-hole resistance can be reduced, a finer multilayer wiring structure can be formed, and the degree of IC integration can be improved.

[Brief explanation of drawings]

1 to 5 are process cross-sectional views of a multilayer interconnection forming process showing one embodiment of the present invention. FIGS. 6 to 8 are partial process sectional views showing an example of a conventional multilayer wiring formation process. 1... Base (Si semiconductor base), 2... Surface oxide film (Sin, film), 3... Lower electrode (second layer A4 wiring)
, 4... interlayer insulating film (polyimide resin), 5...
Ak thin film as a mask for dry etching, 6... Photoresist, 7... Window opening, 8... Through hole, 9
...Top electrode (second layer A4 wiring). Agent: Patent attorney Katsuo Ogawa. Figure 4 Figure 5 Figure 7 Figure 8

Claims (1)

[Claims] 1. Forming a first layer wiring on one main surface of a substrate, embedding the wiring thereon to form an organic film serving as an interlayer insulating film,
A thin film is formed on the organic film as a dry etching mask, and the organic film is dry etched through the dry etching mask to form a through hole reaching the first layer wiring, and then the dry etching mask is applied as a mask. A method for manufacturing a multilayer wiring structure, characterized in that the inside of the through hole is cleaned as described above, and a wiring material for a second layer wiring is deposited on the thin film serving as a mask for dry etching. 2. The method for manufacturing a multilayer wiring structure according to claim 1, wherein the cleaning of the through holes and the deposition of the wiring material are performed continuously in the same apparatus. 3. The method of manufacturing a multilayer wiring structure according to claim 1 or 2, wherein the organic film is a polyimide resin, and the thin film and the wiring material are metals mainly consisting of aluminum.