JPS62243356A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS62243356A
JPS62243356A JP61085007A JP8500786A JPS62243356A JP S62243356 A JPS62243356 A JP S62243356A JP 61085007 A JP61085007 A JP 61085007A JP 8500786 A JP8500786 A JP 8500786A JP S62243356 A JPS62243356 A JP S62243356A
Authority
JP
Japan
Prior art keywords
pellet
semiconductor device
wirings
prom
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61085007A
Other languages
Japanese (ja)
Inventor
Hideto Nitta
新田 秀人
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61085007A priority Critical patent/JPS62243356A/en
Publication of JPS62243356A publication Critical patent/JPS62243356A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration

Abstract

PURPOSE:To allow a PROM element to be readily written externally with information and to reduce the size of a semiconductor device by writing information in the PROM element as the semiconductor device by temporarily wiring the PROM element to be packaged, and then forming necessary wirings externally as the device instead of temporary wirings. CONSTITUTION:A PROM pellet 1, a wiring pattern 4 and external leads 5 are connected with fine metal wirings 6 thereamong to form temporary wirings. Fine metal wirings 6 are connected only with a pad 1a necessary in case of writing information in the pellet 1, and connected directly with or indirectly through a wiring pattern 4 with external leads 5. A predetermined electric signal is supplied through the leads 5 to the pellet 1, and information is written completely in the pellet 1. Thereafter, unnecessary portion of the wirings 6 is removed as the temporary wirings, the necessary wirings of a semiconductor device are connected by the wirings 6 with the pellet 1 and a 1-chip microcomputer pellet 2 to electrically connect the pattern 4 with the leads 5. Thus, a desired system is composed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はプログラムプル・リードオンリーメモリ (P
ROM)素子を備える半導体装置の製造方法に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a program pull read-only memory (P
The present invention relates to a method of manufacturing a semiconductor device including a ROM (ROM) element.

〔従来の技術〕[Conventional technology]

一般にPROMを備える半導体装置は、第2図のように
リードフレーム13のアイラン]゛14にPROMペレ
ット11を固着した」二で、ワイヤボンディング技術を
利用してPROMペレット(素子)11の電極パッドと
り−「フレーム13のボスト部とを金属細線16を用い
て電気的に接続し、その上でトランスファーモールド技
術を利用して樹脂17で封止し、パッケージを構成して
いる。
In general, a semiconductor device equipped with a PROM has a PROM pellet 11 fixed to an island 14 of a lead frame 13 as shown in FIG. - The package is constructed by electrically connecting the frame 13 to the boss portion using a thin metal wire 16, and then sealing it with a resin 17 using transfer molding technology.

そして、この半導体装置に情報を電気的に書き込む場合
には、リードフレーム13の外部リード15を図外のP
ROMライターに接続させ、この外部リード15を通し
て書き込み情報をPROMペレット11に供給する方法
が採られている。
When information is electrically written to this semiconductor device, the external leads 15 of the lead frame 13 are connected to P (not shown).
A method is adopted in which the PROM pellet 11 is connected to a ROM writer and written information is supplied to the PROM pellet 11 through the external lead 15.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述したようなPROMを備える半導体装置を実際に実
装する場合においては、通常ではPROM半導体装置と
、1チツプマイクロコンピユータ等の電子部品とを同一
のプリント基板に実装して一つのシステムを構成するこ
とが多い。ところが、この構成ではPROM半導体装置
と1チツプマイクロコンピユータの各封止パッケージの
サイズに相当する設置スペースが必要とされるためにシ
ステムが大型になることは避けられず、小型化を図る上
での障害となっている。
When actually mounting a semiconductor device equipped with a PROM as described above, the PROM semiconductor device and an electronic component such as a one-chip microcomputer are usually mounted on the same printed circuit board to form one system. There are many. However, this configuration requires an installation space corresponding to the size of each sealed package of the PROM semiconductor device and the one-chip microcomputer, which inevitably increases the size of the system. It has become an obstacle.

このため、第3図に示すように、PROMペレット11
と1チツプマイクロコンピユータペレツト12とを同一
のパッケージ18内に内装したマルチチップ型の半導体
装置が提案されている。これは1、PROMペレット1
1と1チツプマイクロコンピユータペレツト12とを夫
々セラミックケース19上に固着し、これら各ペレット
11゜12と外部リード20とを金属線!9116で電
気接続してパンケージ18を構成したものである。
Therefore, as shown in FIG.
A multi-chip semiconductor device has been proposed in which a single-chip microcomputer pellet 12 and a single-chip microcomputer pellet 12 are housed in the same package 18. This is 1, PROM pellet 1
1 and 1-chip microcomputer pellets 12 are each fixed on a ceramic case 19, and these pellets 11, 12 and external leads 20 are connected using metal wires! 9116 to form the pan cage 18.

しかしながら、この構成ではPROMペレット11をパ
ッケージ18内に内装した状態では、PROMペレット
11への情報の書き込みが困難になる場合がある。例え
ば、PROMペレット11へ情報を書き込むために必要
な配線が外部リード20に接続されていない場合、或い
は金属細線16で結線した状態では電気的に書き込みが
不能な回路構成となっている場合等である。このため、
PROM素子を備えたこの種の半導体装置を構成するこ
とは困難な状態にあり、半導体装置の小型化を実現する
ことが難しいものになっている。
However, with this configuration, when the PROM pellet 11 is placed inside the package 18, it may be difficult to write information to the PROM pellet 11. For example, if the wiring required to write information to the PROM pellet 11 is not connected to the external lead 20, or if the circuit configuration is such that it is electrically impossible to write information when connected with the thin metal wire 16, etc. be. For this reason,
It is difficult to construct this type of semiconductor device equipped with a PROM element, and it has become difficult to realize miniaturization of the semiconductor device.

〔問題点を解決するだめの手段〕[Failure to solve the problem]

本発明はこのような問題点を解消してPROM素子を備
える半導体装置の小型化及びその製造の容易化の達成を
可能とするものである。
The present invention solves these problems and makes it possible to reduce the size of a semiconductor device including a PROM element and to facilitate its manufacture.

本発明の半導体装置の製造方法は、マルチチップに構成
されに半導体装置内にパッケージするPROM素子に対
して仮配線を行なう工程と、この仮配線を用いて前記P
ROM素子への情報の書き込みを行なう工程と、前記仮
配線に代えてPROM素子に半導体装置として必要な配
線を接続する工程とを含んでいる。
The method of manufacturing a semiconductor device according to the present invention includes a step of temporarily wiring a PROM element configured as a multi-chip and packaged in a semiconductor device;
The method includes a step of writing information into the ROM element, and a step of connecting wiring necessary for the semiconductor device to the PROM element in place of the temporary wiring.

〔実施例〕〔Example〕

次に、本発明を図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例を説明するための斜視図であ
り、この図を用いて本実施例方法を工程順に説明する。
FIG. 1 is a perspective view for explaining one embodiment of the present invention, and the method of this embodiment will be explained in order of steps using this diagram.

先ず、表面に所要の配線パターン4を形成しかつその縁
部に複数本の外部リード5を備えたセラミック等の絶縁
基板3上に、PROMペレット1及び1チツプマイクロ
コンピユータペレツト2を夫々固着する。そして、ワイ
ヤポンディング技術によって前記PROMペレット1.
配線パターン4、外部リード5との間を金属金属細線6
で電気的に接続し、仮の配線を形成する。この場合、P
ROMペレット1は、PROMペレット1内に情報を電
気的に書き込む場合に必要なパッド1aのみに金属細線
6を接続してこれを直接或いは配線パターン4を介して
間接に前記外部リード5に接続している。
First, a PROM pellet 1 and a one-chip microcomputer pellet 2 are respectively fixed onto an insulating substrate 3 made of ceramic or the like, which has a required wiring pattern 4 formed on its surface and has a plurality of external leads 5 on its edges. . Then, the PROM pellet 1.
A thin metal wire 6 is connected between the wiring pattern 4 and the external lead 5.
Make electrical connections and form temporary wiring. In this case, P
The ROM pellet 1 has a thin metal wire 6 connected only to the pad 1a necessary for electrically writing information into the PROM pellet 1, and this is connected directly or indirectly to the external lead 5 via the wiring pattern 4. ing.

この状態で図外のPROMライターに絶縁基板3をセッ
トし、その外部リード5を通して所要の電気信号をPR
OMペレット1に供給し、PROMペレット1内に情報
の書き込みを完了する。
In this state, set the insulating board 3 in a PROM writer (not shown) and send the required electrical signal through the external lead 5.
OM pellet 1 is supplied to complete writing of information into PROM pellet 1.

しかる後、仮配線としての前記金属細線6の中、最終的
に不要とされるものを除去する。そして半導体装置とし
て必要な本来の配線の中で不足している配線を金属細線
6を用いて前記PROMペレット1と1チツプマイクロ
コンピユータペレツト2の夫々に新たに接続し、配線パ
ターン4及び外部リード5との間の電気的な接続を行う
。これにより、PROMペレット1.1チツプマイクロ
コンピユータペレツト2.配線パターン4及び外部リー
ド5の間に夫々必要な配線を形成し、これらで所望のシ
ステムが構成される。
Thereafter, those that are ultimately unnecessary are removed from among the thin metal wires 6 serving as temporary wiring. Then, the missing wiring among the original wiring necessary for a semiconductor device is newly connected to each of the PROM pellet 1 and the one-chip microcomputer pellet 2 using thin metal wires 6, and the wiring pattern 4 and external leads are connected to each other. Make an electrical connection with 5. As a result, PROM pellet 1.1 chip microcomputer pellet 2. Necessary wiring is formed between the wiring pattern 4 and the external lead 5, respectively, and a desired system is configured by these.

その上で、キャップ7又は図外の外装樹脂で前記各ペレ
ット1.2を封止してパッケージを構成することにより
、第3図に示したような一つのパッケージ内にPROM
ペレットとその他のペレットとを内装してシステムを構
成したマルチチップ構造の半導体装置を得ることができ
る。
Then, by sealing each of the pellets 1.2 with a cap 7 or an exterior resin (not shown) to form a package, PROM can be stored in one package as shown in FIG.
It is possible to obtain a semiconductor device with a multi-chip structure in which a system is constructed by incorporating pellets and other pellets.

このように製造された半導体装置は、パッケージ内にP
ROMペレット1と1チツプマイクロコンピユータペレ
ツト2を内装したマルチチップ半導体装置として構成さ
れているために、夫々をバソケージ化して配線基板に実
装する場合ムこ比較して設置スペースを低減でき、半導
体装置の小型化を実現できることは言うまでもない。
The semiconductor device manufactured in this way has P inside the package.
Since it is configured as a multi-chip semiconductor device containing a ROM pellet 1 and a 1-chip microcomputer pellet 2, the installation space can be reduced compared to that required when each is made into a bath cage and mounted on a wiring board. Needless to say, it is possible to achieve miniaturization.

また、この半導体装置は、最初の工程で仮の配線を行っ
ているので、絶縁基板3に設けた外部リード5をそのま
ま利用して、しかも既存のPROMライターをそのまま
利用してPROMペレット1への情報書き込みを極めて
容易に行うことができる。
In addition, since this semiconductor device performs temporary wiring in the first process, the external leads 5 provided on the insulating substrate 3 can be used as they are, and the existing PROM writer can be used as is to connect the PROM pellet 1. Information can be written extremely easily.

更に、この半導体装置は、PROMペレット1への情報
書き込みを行った後に、金属細線6の仮配線を除去し、
改めて本来必要とされる金属細線6の接続を行っている
ので、最終的には所望の配線が施された半導体装置を完
成することができる。
Further, in this semiconductor device, after writing information to the PROM pellet 1, the temporary wiring of the thin metal wire 6 is removed,
Since the originally required thin metal wires 6 are connected again, it is possible to finally complete a semiconductor device with the desired wiring.

なお、前記実施例は本発明の一実施例にすぎず、本発明
はPROM素子を備えるマルチチップ構成の半導体装置
の全ての製造において同様に適用できることは勿論言う
までもない。
It should be noted that the above-mentioned embodiment is only one embodiment of the present invention, and it goes without saying that the present invention can be similarly applied to all types of manufacturing of multi-chip semiconductor devices including PROM elements.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、PROM素子を内装する
マルチチップ構成の半導体装置の製造において、パッケ
ージするPROM素子に対して仮配線を行った状態でP
ROM素子への1W報の書き込みを行い、その後に仮配
線に代えて半導体装置としてa・要な配線を形成してい
るので、PROM素子への情報書き込みを外部から実行
することが難しい回路構成の半導体装置においてもこれ
を極めて容易に行うことができ、半導体装置の小型化を
図るとともに、その製造の容易化を達成できる。
As explained above, in the manufacture of a semiconductor device with a multi-chip configuration in which a PROM element is built-in, the present invention provides a
Since the 1W information is written to the ROM element and then the main wiring is formed as a semiconductor device instead of temporary wiring, it is difficult to write information to the PROM element from outside. This can be done extremely easily in semiconductor devices as well, making it possible to reduce the size of the semiconductor device and to facilitate its manufacture.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例方法を説明するための斜視図
、第2図は従来構造の断面図、第3図はマルチチップ化
した半導体装置の断面図である。 1.11・・・PROMペレット、2,12・・・1チ
ソプマイクロコンピユータペレ・ノド、3・・・絶縁基
板、4・・・配線パターン、5・・・外部リード、6・
・・金属細線、13・・・リードフレーム、14・・・
アイランド、15・・・外部リード、16・・・金属細
線、17・・・樹脂、18・・・パソケー第1図 第2図
FIG. 1 is a perspective view for explaining a method according to an embodiment of the present invention, FIG. 2 is a sectional view of a conventional structure, and FIG. 3 is a sectional view of a multi-chip semiconductor device. 1.11... PROM pellet, 2, 12... 1 chip microcomputer pellet, 3... insulation board, 4... wiring pattern, 5... external lead, 6...
...Thin metal wire, 13...Lead frame, 14...
Island, 15...External lead, 16...Metal thin wire, 17...Resin, 18...Pasoka Figure 1 Figure 2

Claims (2)

【特許請求の範囲】[Claims] (1)少なくともPROM素子を内装するマルチチップ
構成の半導体装置の製造に際し、パッケージするPRO
M素子に対して仮配線を行なう工程と、この仮配線を用
いて前記PROM素子への情報の書き込みを行なう工程
と、前記仮配線に代えてPROM素子に半導体装置とし
て必要な配線を接続する工程とを含むことを特徴とする
半導体装置の製造方法。
(1) PRO to be packaged when manufacturing a semiconductor device with a multi-chip configuration that includes at least a PROM element
A step of providing temporary wiring to the M element, a step of writing information to the PROM element using this temporary wiring, and a step of connecting wiring necessary for the semiconductor device to the PROM element in place of the temporary wiring. A method for manufacturing a semiconductor device, comprising:
(2)仮配線の中の不要の配線を除去し、不足する配線
を新たに接続して半導体装置として必要な配線の接続を
行なってなる特許請求の範囲第1項記載の半導体装置の
製造方法。
(2) A method for manufacturing a semiconductor device according to claim 1, which comprises removing unnecessary wiring from the temporary wiring and newly connecting the missing wiring to connect the wiring necessary for the semiconductor device. .
JP61085007A 1986-04-15 1986-04-15 Manufacture of semiconductor device Pending JPS62243356A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61085007A JPS62243356A (en) 1986-04-15 1986-04-15 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61085007A JPS62243356A (en) 1986-04-15 1986-04-15 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS62243356A true JPS62243356A (en) 1987-10-23

Family

ID=13846685

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61085007A Pending JPS62243356A (en) 1986-04-15 1986-04-15 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS62243356A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5889722A (en) * 1996-08-27 1999-03-30 Denso Corporation Hybrid integrated circuit device and method of fabricating the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5889722A (en) * 1996-08-27 1999-03-30 Denso Corporation Hybrid integrated circuit device and method of fabricating the same

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