JP2786047B2 - Resin-sealed semiconductor device - Google Patents
Resin-sealed semiconductor deviceInfo
- Publication number
- JP2786047B2 JP2786047B2 JP4051197A JP5119792A JP2786047B2 JP 2786047 B2 JP2786047 B2 JP 2786047B2 JP 4051197 A JP4051197 A JP 4051197A JP 5119792 A JP5119792 A JP 5119792A JP 2786047 B2 JP2786047 B2 JP 2786047B2
- Authority
- JP
- Japan
- Prior art keywords
- resin
- semiconductor device
- mounting
- leads
- semiconductor chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
Description
【０００１】[0001]
【産業上の利用分野】本発明は樹脂封止型半導体装置に
関し、特にプリント基板上へ実装する樹脂封止型半導体
装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-sealed semiconductor device, and more particularly, to a resin-sealed semiconductor device mounted on a printed circuit board.
【０００２】[0002]
【従来の技術】従来の樹脂封止型半導体装置は、一例と
して図４に示すように、表面に内部回路と接続する複数
のボンディングパッドを備えた半導体チップ１と、この
半導体チップを搭載固定するアイランド２と、各ボンデ
ィングパッドとそれぞれ対応して設けられた複数の内部
リード３ｂと、これら各内部リード３ｂとそれぞれ対応
して接続する複数の外部リード６と、各内部リード３ｂ
と各ボンディングパッドとをそれぞれ対応して接続する
複数のボンディング線４と、半導体チップ１，アイラン
ド２，各内部リード３ｂ及び各ボンディング線４を内部
に封入する封止樹脂部５ａとを有する構造となってお
り、外部リード６を所定の形に加工して実装用基板７ａ
とプリント配線７１にはんだ付け実装していた。2. Description of the Related Art In a conventional resin-encapsulated semiconductor device, as shown in FIG. 4, as an example, a semiconductor chip 1 having a plurality of bonding pads on its surface connected to internal circuits, and this semiconductor chip is mounted and fixed. Island 2, a plurality of internal leads 3b provided corresponding to each bonding pad, a plurality of external leads 6 respectively connected to these internal leads 3b, and a plurality of internal leads 3b
And a plurality of bonding lines 4 for respectively connecting the semiconductor chip 1 and the bonding pads, and a sealing resin portion 5a for enclosing the semiconductor chip 1, the island 2, the internal leads 3b and the bonding lines 4 therein. The external lead 6 is processed into a predetermined shape, and a mounting substrate 7a is formed.
And the printed wiring 71 was mounted by soldering.
【０００３】[0003]
【発明が解決しようとする課題】この従来の樹脂封止型
半導体装置は、プリント配線７１と接続する為の外部リ
ード６を持っている為、実装時までの工程で外部リード
６を曲げてしまい、実装時にはんだ付けがうまくできな
い場合があったり、プリント配線７１と外部リード６と
をはんだ付けする時、樹脂封止型半導体装置がはんだ付
け温度にさらされる為、その温度に耐える封止樹脂を使
用しなければならないという問題点があった。さらに、
外部リード６が露出している為、帯電した導体が触れた
り、あるいは樹脂封止型半導体装置が帯電している時に
リードが接地状態となった場合に内部回路素子を破壊す
る危険性があった。Since the conventional resin-encapsulated semiconductor device has the external leads 6 for connecting to the printed wiring 71, the external leads 6 are bent in a process until mounting. In some cases, soldering may not be performed properly during mounting, or when the printed wiring 71 and the external lead 6 are soldered, the resin-sealed semiconductor device is exposed to the soldering temperature. There was a problem that it had to be used. further,
Since the external leads 6 are exposed, there is a danger that the internal circuit elements will be destroyed if the charged conductor touches or if the leads are grounded when the resin-encapsulated semiconductor device is charged. .
【０００４】本発明の目的は、実装時に温度を高くしな
くても接続が良好にでき、かつ帯電による内部回路素子
の破壊を防止することができる樹脂封止型半導体装置を
提供することにある。An object of the present invention is to provide a resin-encapsulated semiconductor device which can make a good connection without increasing the temperature at the time of mounting and can prevent the destruction of internal circuit elements due to charging. .
【０００５】[0005]
【課題を解決するための手段】本発明の樹脂封止型半導
体装置は、表面に内部回路と接続する複数のボンディン
グパッドを備えた半導体チップと、この半導体チップを
搭載固定するアイランドと、前記各ボンディングパッド
とそれぞれ対応して設けられ実装用ピンを接続固定する
ための板ばねを備えた複数の内部リードと、これら各内
部リードと前記各ボンディングパッドとをそれぞれ対応
して接続する複数のボンディング線と、これら各内部リ
ードの板ばねと対応する位置に前記実装用ピンが挿入さ
れる貫通穴を備え前記各内部リードの貫通穴部分以外の
部分，前記半導体チップ，アイランド，及び各ボンディ
ング線を内部に封入する封止樹脂部とを有している。According to the present invention, there is provided a resin-encapsulated semiconductor device comprising a semiconductor chip having a plurality of bonding pads connected to an internal circuit on a surface thereof, an island for mounting and fixing the semiconductor chip, and A plurality of internal leads provided corresponding to the bonding pads and provided with leaf springs for connecting and fixing the mounting pins; and a plurality of bonding wires for connecting the respective internal leads and the respective bonding pads respectively. And a through-hole into which the mounting pin is inserted at a position corresponding to the leaf spring of each of the internal leads, and a portion other than the through-hole portion of each of the internal leads, the semiconductor chip, the island, and each of the bonding wires. And a sealing resin part to be enclosed in the sealing resin.
【０００６】[0006]
【実施例】次に本発明の実施例について図面を参照して
説明する。Next, an embodiment of the present invention will be described with reference to the drawings.
【０００７】図１（Ａ），（Ｂ）は本発明の第１の実施
例の平面図及び断面図である。FIGS. 1A and 1B are a plan view and a sectional view, respectively, of a first embodiment of the present invention.
【０００８】この実施例は、表面に内部回路と接続する
複数のボンディングパッド１１を備えた半導体チップ１
と、この半導体チップ１を搭載固定するアイランド２
と、各ボンディングパッド１１とそれぞれ対応して設け
られ実装用ピンを接続固定するための板ばね３１を備え
た複数の内部リード３と、これら各内部リード３と各ボ
ンディングパッド１１とをそれぞれ対応して接続複数の
ボンディング線４と、これら各内部リード３の板ばね３
１と対応する位置に実装用ピンが挿入される貫通穴５１
部分以外の部分、半導体チップ１，アイランド２，及び
各ボンディング線４を内部に封入する封止樹脂部５とを
有する構造となっている。In this embodiment, a semiconductor chip 1 having a plurality of bonding pads 11 connected to an internal circuit on its surface is described.
And an island 2 for mounting and fixing the semiconductor chip 1
And a plurality of internal leads 3 provided corresponding to the respective bonding pads 11 and provided with leaf springs 31 for connecting and fixing the mounting pins, and the respective internal leads 3 correspond to the respective bonding pads 11. A plurality of bonding wires 4 and a leaf spring 3 of each of these internal leads 3.
Through hole 51 into which mounting pin is inserted at a position corresponding to 1
It has a structure other than the part, a semiconductor chip 1, an island 2, and a sealing resin part 5 for sealing each bonding wire 4 therein.
【０００９】図２（Ａ），（Ｂ）はそれぞれ第１の実施
例による樹脂封止型半導体装置を実装用基板に実装した
ときの平面図及び断面図である。FIGS. 2A and 2B are a plan view and a sectional view, respectively, when the resin-sealed semiconductor device according to the first embodiment is mounted on a mounting substrate.
【００１０】実装用基板７には、表面にプリント配線７
１が形成されており、このプリント配線７１と接続する
複数の実装用ピン７２がこの実施例の樹脂封止型半導体
装置の貫通穴５１とそれぞれ対応する位置に突出して設
けられている。これら各実装用ピン７２を対応する貫通
穴５１に挿入することにより、各実装用ピン７２と対応
する内部リード３の板ばね３１とが結合，接続し、樹脂
封止型半導体装置が実装容器板７に固定，実装される。[0010] A printed wiring 7 is provided on the surface of the mounting substrate 7.
1 are formed, and a plurality of mounting pins 72 connected to the printed wiring 71 are provided at positions corresponding to the through holes 51 of the resin-sealed semiconductor device of this embodiment. By inserting these mounting pins 72 into the corresponding through holes 51, the mounting pins 72 and the corresponding leaf springs 31 of the internal leads 3 are connected and connected, and the resin-sealed semiconductor device is mounted on the mounting container plate. 7 and mounted.
【００１１】従って、従来のはんだ付け実装のように高
温にする必要がなく封止樹脂部５のを耐熱性材料にする
必要がなく、しかも極めて容易に内部リード３と実装用
ピン７２とを確実に接続することができる。Therefore, unlike the conventional solder mounting, there is no need to raise the temperature and the sealing resin portion 5 does not need to be made of a heat-resistant material. Further, the internal leads 3 and the mounting pins 72 can be very easily secured. Can be connected to
【００１２】また、封止樹脂部５の外表面にリードが露
出していないので、取扱いの際のリードの曲り等の不都
合もなく、また内部リード３には接触しにくい構造とな
っているので、帯電による内部回路素子の破損もなくな
る。Further, since the leads are not exposed on the outer surface of the sealing resin portion 5, there is no inconvenience such as bending of the leads at the time of handling, and the structure is such that the inner leads 3 are hardly contacted. Also, damage to the internal circuit element due to charging is eliminated.
【００１３】図３（Ａ），（Ｂ）はそれぞれ本発明の第
２の実施例を示す平面図及び断面図である。FIGS. 3A and 3B are a plan view and a sectional view, respectively, showing a second embodiment of the present invention.
【００１４】第１の実施例では２枚の板ばね３１で実装
用ピン７２を挾む構造となっていたが、この第２の実施
例では板ばね３１は１枚だけになっている。従って、内
部リード３ａの寸法を小さくすることができ、樹脂封止
型半導体装置の外径寸法を小さくできるという利点があ
る。In the first embodiment, the mounting pin 72 is sandwiched between the two leaf springs 31. However, in the second embodiment, only one leaf spring 31 is provided. Therefore, there is an advantage that the size of the internal lead 3a can be reduced, and the outer diameter of the resin-sealed semiconductor device can be reduced.
【００１５】[0015]
【発明の効果】以上説明したように本発明は、従来の外
部リードをなくして内部リードに板ばねを設け、封止樹
脂部の貫通穴を介して実装用ピンと内部リードとを直接
結合，接続する構造とすることにより、はんだ付けの必
要がないので封止樹脂部に耐熱性材料を使用する必要が
なく、封止樹脂部外表面にリードが露出しないで接触し
にくい構造となっているので、取扱いの際リードの曲げ
等の不都合がなく実装用ピンを挿入するだけで確実に内
部リードと実装用ピンとを接続することができ、かつ帯
電等による内部回路素子の破壊を防止することができる
効果がある。As described above, the present invention eliminates the conventional external leads and provides a leaf spring on the internal leads, and directly connects and connects the mounting pins and the internal leads through the through holes in the sealing resin portion. The structure does not require soldering, so there is no need to use a heat-resistant material for the sealing resin part, and the structure is such that the leads are not exposed and exposed to the outer surface of the sealing resin part. In this case, the internal lead and the mounting pin can be reliably connected only by inserting the mounting pin without inconvenience such as bending of the lead during handling, and destruction of the internal circuit element due to charging or the like can be prevented. effective.
【図１】本発明の第１の実施例を示す平面図及び断面図
である。FIG. 1 is a plan view and a sectional view showing a first embodiment of the present invention.
【図２】図１に示された実施例の実装方法を説明するた
めの平面図及び断面図である。2A and 2B are a plan view and a cross-sectional view for explaining a mounting method of the embodiment shown in FIG.
【図３】本発明の第２の実施例を示す平面図及び断面図
である。FIG. 3 is a plan view and a sectional view showing a second embodiment of the present invention.
【図４】従来の樹脂封止型半導体装置の一例を示す断面
図である。FIG. 4 is a cross-sectional view showing an example of a conventional resin-encapsulated semiconductor device.
１ 半導体チップ ２ アイランド ３，３ａ，３ｂ 内部リード ４ ボンディング線 ５，５ａ 封止樹脂部 ６ 外部リード ７，７ａ 実装用基板 ８ はんだ １１ ボンディングパッド ３１ 板ばね ５１ 貫通穴 ７１ プリント配線 ７２ 実装用ピン DESCRIPTION OF SYMBOLS 1 Semiconductor chip 2 Island 3, 3a, 3b Internal lead 4 Bonding wire 5, 5a Sealing resin part 6 External lead 7, 7a Mounting substrate 8 Solder 11 Bonding pad 31 Leaf spring 51 Through hole 71 Printed wiring 72 Mounting pin
Claims (1)
ィングパッドを備えた半導体チップと、この半導体チッ
プを搭載固定するアイランドと、前記ボンディングパッ
ドとそれぞれ対応して設けられ実装用ピンを接続固定す
るための板ばねを備えた複数の内部リードと、これら各
内部リードと前記各ボンディングパッドとをそれぞれ対
応して接続する複数のボンディング線と、前記半導体チ
ップ、アイランド、及び各ボンディング線を内部に封入
する樹脂封止部と、前記樹脂封止部の第１の面から対向
する第２の面まで達する貫通穴であって、その中程にお
いて前記内部リードの板ばねの一部が露出している貫通
穴とを有することを特徴とする樹脂封止型半導体装置。1. A semiconductor chip having a plurality of bonding pads connected to an internal circuit on a surface thereof, an island for mounting and fixing the semiconductor chip, and mounting pins provided respectively corresponding to the bonding pads for connection and fixing. A plurality of internal leads provided with leaf springs, a plurality of bonding lines respectively connecting the respective internal leads and the respective bonding pads, and encapsulating the semiconductor chip, the island and the respective bonding lines therein. Facing from the first surface of the resin sealing portion to be
Through hole reaching the second surface,
Through which a part of the leaf spring of the inner lead is exposed.
A resin-sealed semiconductor device having a hole .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4051197A JP2786047B2 (en) | 1992-03-10 | 1992-03-10 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4051197A JP2786047B2 (en) | 1992-03-10 | 1992-03-10 | Resin-sealed semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH05259350A JPH05259350A (en) | 1993-10-08 |
| JP2786047B2 true JP2786047B2 (en) | 1998-08-13 |
Family
ID=12880164
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4051197A Expired - Fee Related JP2786047B2 (en) | 1992-03-10 | 1992-03-10 | Resin-sealed semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2786047B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102016201800A1 (en) * | 2016-02-05 | 2017-08-10 | Robert Bosch Gmbh | Mold module, method for producing a mold module and mold tool for Moldumspritzung a mold module |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63190368A (en) * | 1987-02-02 | 1988-08-05 | Matsushita Electric Works Ltd | Pin grid array |
| JPS6454752A (en) * | 1987-08-26 | 1989-03-02 | Hitachi Ltd | Pin grid array semiconductor package |
-
1992
- 1992-03-10 JP JP4051197A patent/JP2786047B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH05259350A (en) | 1993-10-08 |
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