JPS62213114A - Recrystalizing method for active region in high withstand voltage transistor - Google Patents

Abstract

PURPOSE:To enable recrystalization of an active region of several +mum or more in width to be easily performed, by annealing a polycrystal silicon layer formed around a drain region and performing crystal growth with the core of the drain region having crystal particles serving as cores. CONSTITUTION:A polycrystal silicon layer 6 is formed on a substrate 1, and formed in an island shape to make a drain region 2. Then, an oxidizing silicon layer 7 is formed and the drain region 2 composed of this polycrystal silicon layer is recrystalized by using an annealing method. the oxidizing silicon layer 7 comprising parts of a drift region + channel regin + source is etched, and this step-different polycrystal silicon layer is coated with photoresist or the like to become flat, and then etching of the photoresist or polycrystal silicon is performed from the upper side to form a polycrystal silicon layer 9. Then, annealing in a solid-phase state makes crystal particles in the drain region 2 become cores, so that the polycrystal silicon in the polycrystal silicon layer 9 become seed-crystalized. Hence, recrystalization can be easily performed even if the polycrystal silicon region ranges in a large area.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for recrystallizing the active region of a high voltage transistor that can increase the driving capability.

[Background Art: 1 In recent years, display devices have been occupying an increasingly important position in the information society. At the same time, there is an increasing demand for thinner display devices.

Therefore, various T F T (Th1n rift T
(transistor) structures have been studied, and methods using amorphous silicon and polycrystalline silicon are becoming mainstream.

Here, research on TPT for driving liquid crystals has been relatively intensive since the driving voltage is low. But EL
In this case, a TPT with a high driving voltage is required. An example of manufacturing TPT with such high driving voltage is Proceedings of the Society for Information Displays.
of the 5ocietyfor Infor
tion Display), VoL, 2
Reported on May 2, 1984. This structure is shown in FIG. 2, in which 1 is a quartz substrate, 2 is a drain region, 3 is a source region, 4 is a gate electrode, 15
1 is laser annealed polycrystalline silicon, and 16 is a gate insulating film. As shown in the figure, this structure employs an offset gate structure to increase the voltage. By increasing the offset gate length, the drain breakdown voltage can be increased.

However, in this structure, the resistance of the offset gate portion is high, resulting in a high on-resistance. Therefore, it may be possible to lower the resistance by, for example, implanting impurity ions into this portion. Figure 3 shows its structural diagram. In FIG. 3, reference numeral 8 denotes a drift region in which impurities of the same conductivity type as the drain region are ion-implanted to lower the resistance.

[Problem that the invention seeks to solve]

In order to increase the drive voltage in the high voltage transistors shown in FIGS. 2 and 3, it is necessary to lengthen the offset gate region. Therefore, the transistor has a large active region (offset gate region + channel region). Here, in order to increase the driving ability of the transistor, the mobility of the active region formed by the polycrystalline silicon layer is
It is conceivable to increase . So mobility-
In order to increase the size, it is necessary to make the polycrystalline silicon layer into a single crystal.

For example, techniques for converting polycrystalline silicon into a single crystal include seedless laser annealing and electron beam annealing, but currently only single crystal films with a width of several μrn and a length of several tens of μm are available. Not obtained.

Therefore, in transistors with large active regions such as those shown in FIGS. 2 and 3, it is not possible to uniformly anneal the entire active region, which increases the channel resistance or drift layer resistance, reducing drive capability. Couldn't get enough. Furthermore, when the gate width is increased in an attempt to obtain a desired driving capability, the area occupied by the transistor increases, resulting in problems such as a decrease in the yield of the transistor.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for recrystallizing the active region of a high voltage transistor with high driving ability, which alleviates the drawbacks of the conventional method and facilitates recrystallization with a width of several microns or more.

[Means for solving problems]

The recrystallization method of the active region of a high voltage transistor of the present invention involves forming a drain region having crystal grains serving as a nucleus in a high voltage transistor made of polycrystalline silicon, and forming a polycrystalline silicon layer around the drain region. Then, the polycrystalline silicon layer is annealed using beam annealing or other annealing method, and crystal growth is performed using the drain region having crystal grains as described above as a nucleus.

[Effect]

The highly concentrated layer, which will become the drain portion of the high voltage transistor, is recrystallized using, for example, a laser annealing method so as to serve as a nucleus for crystal growth. Therefore, the drift layer made of polycrystalline silicon formed around this region is subjected to another beam annealing or the like, whereby crystal growth is performed using the highly doped drain region as a seed (5eed).

Therefore, recrystallization becomes easier in a transistor with a long drift layer or a transistor with a large gate width.

Furthermore, since an oxide film is provided around the polycrystalline silicon including the drift layer to prevent heat from being released, recrystallization of a large polycrystalline silicon region is facilitated.

This is because the thermal conductivity of the arsenic acid film is significantly lower than that of silicon, and as a result, the temperature at the periphery of the silicon is maintained higher than the temperature at the center. It is recrystallized to obtain crystals with a large grain size.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings. FIGS. 1(a) to 1(f) are cross-sectional views of a bere-soto shown in the order of steps for explaining an embodiment of the present invention.

First, as shown in FIG. 1(a), a polycrystalline silicon layer 6 with a thickness of about 1 μm is formed on a quartz substrate 1.

Next, as shown in FIG. 1(b), after forming an island-shaped polycrystalline silicon layer that will become the drain region 2 by photolithography, a silicon oxide layer 7 is formed by, for example, CVD. Drain region 2 made of a polycrystalline silicon layer is recrystallized using an annealing method such as laser annealing.

Next, as shown in FIG. 1(c), the portions of the silicon oxide layer 7 that will become the drift region, channel region, and source region are etched to form a polycrystalline silicon layer with a thickness of 1 μm. Next, a photoresist or the like is applied onto the polycrystalline silicon layer with the steps to make it flat. A photoresist or polycrystalline silicon layer 9 is then etched and etched from above by dry etching to form a polycrystalline silicon layer 9. Considering the formation of an N-channel high-voltage MOS transistor, boron is implanted into the polycrystalline silicon layer 9 at a dose of I x 1012/cm2 (phosphorus ions in the case of a p-channel). Next, by annealing in a solid state, the crystal grains in the drain region 2 become nuclei,
Around it, in this embodiment, the polycrystalline silicon of the polycrystalline silicon layer 9 is seeded. Therefore,
Even if the polycrystalline silicon region 9 has a large area, recrystallization becomes easy.

Further, the oxide film 7 is provided to prevent the heat from the polycrystalline silicon from escaping, and is effective in recrystallizing the heat from the polycrystalline silicon layer 9 uniformly.

Next, as shown in FIG. 1(d), phosphorus ions are implanted to form a drift region 8.

Next, as shown in FIG. 1(e), 14
A thin gate oxide film 11 is formed by etching the oxide film 14 in the portion that will become the channel region, and by thermal oxidation or the like. On top of that, the thickness is about 500mm
A polycrystalline silicon layer with a thickness of 100 nm is formed to serve as a gate electrode 4. Next, using this gate electrode 4 as a mask, the source region 3 is
Then, arsenic or phosphorus ions are implanted into the drain region 2.

Next, as shown in FIG. 1 (f>), a passivation film 12 is formed, contact holes are opened, and a drain electrode 5 and source electrode 13 are formed.As a result, a high voltage MOSFET is realized. As a result, it becomes easy to increase the mobility of the active region, and a high breakdown voltage transistor made of a polycrystalline silicon layer with high driving ability can be obtained.

〔Effect of the invention〕

As explained above, in the present invention, a drain region having core crystal grains is formed, a polycrystalline silicon layer is formed around the drain region, and the polycrystalline silicon layer is annealed by beam annealing or the like. Since crystal growth is performed using the drain region as a core, recrystallization of the active region with a width of several micrometers or more is facilitated, and as a result, a high breakdown voltage transistor with high driving ability can be easily obtained.

[Brief explanation of drawings]

FIGS. 1(a) to 3(f) are cross-sectional views of pellets shown in the order of steps to explain one embodiment of the present invention, and FIGS.
The figure is a cross-sectional view of a conventional high voltage polycrystalline silicon transistor. DESCRIPTION OF SYMBOLS 1... Quartz substrate, 2... Drain region, 3... Source region, 4... Gate electrode, 5... Drain region, 6... Polycrystalline silicon layer, 7... Silicon oxide layer, 8... drift region, 9... polycrystalline silicon layer,
1o... Channel region, 11... Gate oxide film, 1
2...passivation film, 13...-source electrode,
14... Oxide film, 15... Laser annealed polycrystalline silicon layer, 16... Gate insulating film.

Claims (1)

[Claims] In a high-voltage transistor made of polycrystalline silicon, a drain region having core crystal grains is formed, a polycrystalline silicon layer is formed around the drain region, and the polycrystalline silicon layer is subjected to beam annealing or other annealing method. 1. A method for recrystallizing an active region of a high-voltage transistor, characterized in that crystal growth is performed using a drain region having crystal grains serving as a core as a core.