JPS61125169A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain an element having high speed properties and low leakage current characteristics by a simple manufacturing process by melting and recrystallizing one part of a SOI having island structure, forming a channel region to one part of a recrystallizing layer and shaping a MOS transistor. CONSTITUTION:A polycrystalline silicon layer is formed onto an insulating substrate 2 consisting of SiO2, etc., and a polycrystalline silicon island 1 surrounded by SiO22 is shaped through a photoetching process and an SiO2 forming process by thermal oxidation, etc. The central section of the major axis of the rectangle of the island 1 is irradiated vertically by laser beam 4 while being scanned by them, thus forming a melting recrystallizing region A. A gate electrode 5 is shaped in the region A, and source and drain electrodes 6 are formed while a contact pattern is formed so as to be connected to the region A and non-melting regions B.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is directed to SOI (Sem1 conductor
The present invention relates to a method of manufacturing a semiconductor device known as a structural element (Insulator).

Conventional structure and its problems Traditionally, SOS is used as an element formed on an insulator.
(5ilicon on 5apphire) elements are known, but alumina (A
There are problems such as deterioration of electrical characteristics due to contamination of A/ into the crystalline silicon layer from 1203) and the high cost of sapphire as an insulating substrate. In order to improve these problems, research and development on SOI structures using SiO2 as an insulator have recently been actively conducted. SOI
In the case of the structure, since the substrate 5lo2 is amorphous, the semiconductor layer formed on SiO2 is amorphous or polycrystalline, and as it is, it is difficult to form a device that can withstand practical use. It is difficult. Therefore, 51
The semiconductor layer on 02 is heated by an energy beam, a graphite heater, etc. to melt and recrystallize it to increase the grain size. but.

At present, it is difficult to produce single crystals or large crystal grains over a large enough area to make ICs.
MOS (Metal
When an IC including a transistor is formed, there is a problem in that the electrical characteristics of the transistor deteriorate due to the large number of crystal grain boundaries in the channel region.

Purpose of the Invention The present invention provides a method for forming an SOI structure by irradiating an energy beam such as a laser or an electron beam to form an SO element. The present invention provides a method for manufacturing a semiconductor device for realizing an element with excellent electrical characteristics by forming a MO3) transistor by forming a channel region in a part of the crystallized layer. .

Composition of the invention The configuration of the present invention will be explained with reference to FIG.

As shown in (-) in Figure 1, an insulating substrate 2 such as 5IQ2
A part of the semiconductor island 1 is melted and recrystallized by scanning an energy beam, such as a laser beam 4, in the direction of the arrow on the semiconductor island 1 which is insulated and isolated above, as shown in FIG. 1(b).
A semiconductor island 1' consisting of a recrystallized part A and an unmelted part B is formed as shown in FIG. After that, as shown in FIG. 1(c), a gate electrode 5 and a source/drain PN junction are formed in a part of the recrystallized part A of the semiconductor island 1', and a part of the recrystallized part A is formed. A source and drain electrode 6 having a contact portion 7 consisting of a part of the unmelted part B and a part of the unmelted part B is formed.
OS) form a transistor.

DESCRIPTION OF EMBODIMENTS An embodiment of the method for manufacturing a semiconductor device according to the present invention will be described with reference to FIG.

For example, a layer of S x O23 formed on a fused quartz plate or a silicon substrate is formed, and after a polycrystalline silicon layer is formed by the ufLPCVD method, the polycrystalline silicon surrounded by psio22 is formed by a photoetching process and a Si○2 forming process. Island 1 is formed.

S1022 may be formed by thermal oxidation method, or CV
Needless to say, it may be formed by method D. Further, although the shape of the polycrystalline silicon island 1 is rectangular in this case, other shapes may be used. The size of the rectangle in this case is 200
Although Miflon XS micron is used, it goes without saying that it can be made to any desired size depending on the situation.

Next, as shown in FIG. 2C, the polycrystalline silicon island 1 is irradiated with, for example, an argon CW laser beam 4 while scanning in the direction of the arrow. In this case, the laser irradiation conditions were a power of 3 to 7 W, a beam diameter of 30 microns, and a scanning speed of 1100 rtr/sec, and the laser was scanned so as to be incident perpendicularly to the center of the rectangular long axis of the polycrystalline silicon island 1. As a result, the polycrystalline silicon island 1 consists of a melted and recrystallized region A of about 30 microns in the center of the island and an unmelted region B of about 10 microns wide at both ends.
’ is formed. The central part of the recrystallized part A is a single crystal with a width of about 10ξcm.

Next, as shown in FIG. 2(d), a silicon island transistor (1'KMOs) is formed using conventional IC forming processes such as gate oxidation, photolithography, and diffusion process. The gate electrode 5 is formed with an accuracy of 1 micron or less in alignment with the center of the recrystallized part A of the silicon island 1', and the source and drain electrodes 6 are formed in the center of the recrystallized part A of the silicon island 1' and the unmelted part. It is formed with a vertical contact pattern 7 so as to be connected to B. Therefore, the source/drain PN junction is shadowed by the recrystallized portion AK.

The gate electrode, source and drain electrodes are connected to the semiconductor island 1.
In order to install the energy beam 4 and the semiconductor island 1 at each desired position, it is desirable that the alignment accuracy of the energy beam 4 and the semiconductor island 1 be several microns or less. Further, the alignment between the semiconductor island 1' and the gate electrode 6 and the source and drain electrodes 6 only needs to be as accurate as one step of ordinary photolithography (1 micron or less).

Next, an embodiment for obtaining a single crystal region with better controllability in the center of polycrystalline silicon island 1 will be described with reference to FIG.

As shown in FIG. 3(a), a recess 8, for example 3000 mm, is provided in the center of the polycrystalline/licon island 1, and as shown in FIG. Make it irradiated. The size and positional relationship at this time are, for example, if the polycrystalline silicon island 1 is a 20 micron x 50 micron skewer, and the recess 8 is a rectangle with a width of 10 microns and a length of 30 microns. The polycrystalline silicon island 1 is formed in the central part of the polycrystalline silicon island 1 as shown in FIG. 3(c).
As shown in K, it consists of a recrystallized part A with a width of about 30 microns and an unmelted part B with a width of about 10 microns at both ends, and furthermore, in the recessed part included in the recrystallized part A, the whole is a single crystal C. It has been experimentally confirmed that

When forming a MOS (MOS) transistor, the gate electrode may be placed on this single crystal C.

Effects of the Invention As is clear from the above explanation, the M formed according to the present invention
O9) In the transistor, the channel directly under the gate electrode and the junction between the channel and the source/drain are formed of crystal that does not contain grain boundaries, and the unmelted polycrystalline silicon becomes the source/drain diffusion region. Therefore, it has electrical characteristics such as leakage current that are equivalent to MOS transistors formed on a normal single-crystal silicon substrate. 7
Therefore, the MOS transistor formed according to the present invention should be a high-performance device that combines the inherent advantages of SOI devices, such as high speed and low leakage current characteristics of devices made of solid silicon, and can be manufactured easily. It has advantages such as low cost compared to SO8 and the like.

[Brief explanation of drawings]

FIG. 1 shows the method of the present invention, and (-) in the same figure shows the method of the present invention.
(C) in the same figure shows the positional relationship of laser beam scanning to the semiconductor island, and (C) in the figure shows the semiconductor island after recrystallization by laser irradiation. The gate electrode of the MO8I-transistor formed on the semiconductor island of
Figure 2 shows the position of the source and drain electrodes, and shows a method according to an embodiment of the present invention.
, (b) is a plan view and a cross-sectional view of the polycrystalline silicon island formed on the insulating substrate 1, (C) of the same figure shows the silicon island after laser recrystallization, and (d) of the same figure shows the silicon island. Figure 3 shows another method for controlling the single crystallized region of the silicon island after recrystallization, and la) in the same figure shows a plan view of a MOS transistor with a recess. A cross-sectional view of a crystalline silicon island, (1) in the same figure is a diagram showing the positional relationship between the laser and the silicon island, and (1,) in the same figure is a plan view of a silicon island with a concave part after laser recrystallization. . 1...Polycrystalline silicon island, 1'...Silicon island after recrystallization, 2.3...5i02
．． 4... Laser beam, S... Kate pole, 6...7-S drain electrode, 7...
... Contour free line, 8... Concavity of silicon island, A... Region above recrystallization f of silicon island,
B... Unmelted area of silicon island, C...
Single-crystal region of Si 1J concavity. Patent applicant: Director of the Agency of Industrial Science and Technology Tatsu Todoroki Figure 1 Figure 2 Figure 3

Claims (1)

[Claims] forming a non-single-crystalline semiconductor layer insulated into islands on an insulating substrate; melting and recrystallizing at least a portion of the island-like non-single-crystalline semiconductor by irradiation with an energy beam;
forming a recrystallized part and an unmelted part in the same island; forming a gate electrode and a PN junction part of a source and drain in at least a part of the recrystallized part of the semiconductor island; 1. A method of manufacturing a semiconductor device, comprising the step of forming source and drain electrodes made of at least a portion of a recrystallized portion of an island and at least a portion of an unmelted portion.