JPS62203398A - Shielding of printed board - Google Patents

Shielding of printed board

Info

Publication number
JPS62203398A
JPS62203398A JP4652486A JP4652486A JPS62203398A JP S62203398 A JPS62203398 A JP S62203398A JP 4652486 A JP4652486 A JP 4652486A JP 4652486 A JP4652486 A JP 4652486A JP S62203398 A JPS62203398 A JP S62203398A
Authority
JP
Japan
Prior art keywords
circuit board
printed circuit
solder layer
shielding
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4652486A
Other languages
Japanese (ja)
Other versions
JPH0654838B2 (en
Inventor
正雄 高橋
田口 貢市
稲浦 正浩
小林 成好
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP61046524A priority Critical patent/JPH0654838B2/en
Publication of JPS62203398A publication Critical patent/JPS62203398A/en
Publication of JPH0654838B2 publication Critical patent/JPH0654838B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Structure Of Printed Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、電子機器工体で、プリント基板のアース面と
シールド板との間の電気的接触を良好に保つようにした
プリント基板のシールド方法に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for shielding a printed circuit board, which maintains good electrical contact between the ground plane of the printed circuit board and a shield plate in electronic equipment construction. .

従来の技術 従来第3図の筐体1にプリント基板3を搭載し、プリン
ト基板3の裏面に設けたアースパターン3aにシールド
板8を密着させてシールド効果を得ようとする場合に、
第5図に示すように、半田層5aが耐着したアースパタ
ーン3aにシールド板8の端部を圧接させることが行わ
れて来た。
2. Description of the Related Art Conventionally, when a printed circuit board 3 is mounted on a casing 1 shown in FIG.
As shown in FIG. 5, an end portion of a shield plate 8 has been brought into pressure contact with a ground pattern 3a to which a solder layer 5a is adhered.

発明が解決しようとする問題点 しかしながら、上記従来例の方法では、アースパターン
3aの巾がシールド板8と接する全面にわたって一様で
なく、このため、半田層5aの盛り上りddについても
場所によって異なり、このため、シールド効果が不足す
る個所を生ずる欠点があった。
Problems to be Solved by the Invention However, in the conventional method described above, the width of the ground pattern 3a is not uniform over the entire surface in contact with the shield plate 8, and therefore, the height dd of the solder layer 5a also varies depending on the location. Therefore, there was a drawback that there were some places where the shielding effect was insufficient.

本発明は上記従来例の欠点を除去し、簡単な方法により
シールド壁との接触面の全面にわたって良好な接地、即
わちシールド効果が得られるプリント基板のシールド方
法を提供することを目的にするものである。
An object of the present invention is to eliminate the drawbacks of the above-mentioned conventional examples and to provide a shielding method for a printed circuit board that can obtain good grounding over the entire contact surface with the shield wall, that is, a shielding effect, by a simple method. It is something.

問題点を解決するだめの手段 本発明は上記目的を達成するために、シールド壁と接触
するプリント基板のアースパターン比較的中挟で一定巾
の半田層と半田の付かないレジスタ層とが交互に縞模様
状の配列を有するように構成するものである。
Means for Solving the Problems In order to achieve the above object, the present invention has a method in which a solder layer of a constant width and a non-solder resistor layer are alternately sandwiched relatively between the earth pattern of the printed circuit board that contacts the shield wall. It is configured to have a striped pattern arrangement.

作    用 従って、本発明によれば、半田層の巾が一定であるため
に、その盛り上がりもほぼ均一となり、従ってシールド
壁との接触面の全面にわたって均一に圧着され、このた
め良好なシールド効果が得られるものである。
Therefore, according to the present invention, since the width of the solder layer is constant, its bulge is also almost uniform, and therefore it is crimped uniformly over the entire contact surface with the shield wall, and therefore a good shielding effect is achieved. That's what you get.

実施例 以下本発明の実施例について図面さ共に説明する。第3
図は筐体の全体図、第1図は断面図、第2図は下面図を
示している。これらの図で、1は匣体、2はその側壁、
3は筐体1の内部に止めネジ4により保持されたプリン
ト基板、5はプリント基板4の銅箔等より成るアースパ
ターン面3aに設けた帯状の半田層(巾−W)、6は半
田層5と交互に隣接するレジスト層、7はプリント基板
3の上面に搭載された電子部品、8はシールド壁であり
、側壁2に固定されており、ダイキアスト或いは板金に
より形成される。9はプリント基板の止めネジ4の下部
に設けた保持部である。
EXAMPLES Hereinafter, examples of the present invention will be described with reference to the drawings. Third
The figure shows an overall view of the casing, FIG. 1 shows a sectional view, and FIG. 2 shows a bottom view. In these figures, 1 is the case, 2 is its side wall,
3 is a printed circuit board held inside the housing 1 by set screws 4, 5 is a strip-shaped solder layer (width - W) provided on the ground pattern surface 3a made of copper foil, etc. of the printed circuit board 4, and 6 is a solder layer. 5 and adjacent resist layers, 7 are electronic components mounted on the upper surface of the printed circuit board 3, and 8 is a shield wall, which is fixed to the side wall 2 and is formed of die cast or sheet metal. Reference numeral 9 denotes a holding portion provided below the set screw 4 of the printed circuit board.

次に上記構成の動作について説明する。筐体1の保持部
9に止めネジ4により固定されたプリント基板3の下面
にはアースパターン3aが設けられており、アースパタ
ーン3aには、一定巾(1〜数mm程度)の半田層が自
動半田等の工法で形成されている。この半田層5はその
巾Wが一定であるため、表面張力により一定厚さの盛り
上がりdが得られる。従って、シールド壁8の上部は第
1図に示すようにその全面で、半田層と密着するこきに
なる。(第1図は説明の便のために盛り上がりdも誇張
して画かれている。) 次に第4図は、アースパターン3a に設けた半田層5
とレジスト層の種々形状例を示す図であって、(A)、
 (B)は巾W、巾りとも一定の場合、(C)はプリン
ト基板3の弾力とその端部から距離によるたわみを考慮
してWは一定のままLを変化させた例を、(D)はシー
ルド壁8との接触面積を増すように斜に半田層を設けた
例である。
Next, the operation of the above configuration will be explained. A grounding pattern 3a is provided on the lower surface of the printed circuit board 3 fixed to the holding part 9 of the housing 1 with a set screw 4, and a solder layer of a certain width (approximately 1 to several mm) is provided on the grounding pattern 3a. It is formed using methods such as automatic soldering. Since this solder layer 5 has a constant width W, a bulge d of a constant thickness is obtained due to surface tension. Therefore, as shown in FIG. 1, the entire upper part of the shield wall 8 is in close contact with the solder layer. (In Fig. 1, the bulge d is also exaggerated for the convenience of explanation.) Next, Fig. 4 shows the solder layer 5 provided on the ground pattern 3a.
FIG. 2 is a diagram showing examples of various shapes of resist layers,
(B) shows an example in which the width W is constant, and (C) shows an example in which L is changed while keeping W constant in consideration of the elasticity of the printed circuit board 3 and the deflection due to the distance from its edge. ) is an example in which the solder layer is provided obliquely so as to increase the contact area with the shield wall 8.

発明の効果 本発明は上記実施例より明らかなように、プリント基板
のアースパターンを一定巾の半田層を有し、レジスト層
との間で縞模様状の半田付は面を形成したので、この半
田付は面とシールド壁との間の圧着によって、シールド
壁の全面にわたって良好なシールド効果が得られる特徴
を有する。
Effects of the Invention As is clear from the above embodiments, the present invention has a ground pattern of a printed circuit board having a solder layer of a constant width, and the striped solder forms a surface between the ground pattern of the printed circuit board and the resist layer. Soldering has the characteristic that a good shielding effect can be obtained over the entire surface of the shield wall by pressure bonding between the surface and the shield wall.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例におけるプリント基板のシー
ルド方法が使用される装置の断面図、第2図は同下面図
、第3図は同装置の全体構成を示す斜視図、第4図(A
)−4DJは同装置の各種アースパターンの要部平面図
、第5図は従来のプリント基板のシールド方法構成での
要部断面図である。 1・・・筐体、2・・・側壁、3・・・プリント基板、
 3a・・・アースパターン、5・・・半田層、6・・
・レジスト層、8 シールド壁。 代理人の氏名 弁理士 中 尾 敏 男 はか1名第1
図 WJ z 図                   
 6/6’J 第3図 第4図 第 5 図
FIG. 1 is a sectional view of an apparatus in which a printed circuit board shielding method according to an embodiment of the present invention is used, FIG. 2 is a bottom view of the same, FIG. 3 is a perspective view showing the overall configuration of the apparatus, and FIG. 4 (A
)-4DJ is a plan view of essential parts of various ground patterns of the device, and FIG. 5 is a sectional view of essential parts in a conventional printed circuit board shielding method configuration. 1... Housing, 2... Side wall, 3... Printed circuit board,
3a...Earth pattern, 5...Solder layer, 6...
・Resist layer, 8 shield wall. Name of agent: Patent attorney Toshio Nakao (1st person)
Figure WJ z Figure
6/6'J Figure 3 Figure 4 Figure 5

Claims (1)

【特許請求の範囲】[Claims]  プリント基板のアースパターン面に一定巾の半田層と
半田の被着しないレジスト層とを交互に縞模様状に形成
し、前記半田層にシールド板の端部を圧着するようにし
たプリント基板のシールド方法。
A printed circuit board shield in which a solder layer of a constant width and a resist layer to which no solder is adhered are alternately formed in a striped pattern on the ground pattern surface of the printed circuit board, and the end of the shield plate is crimped to the solder layer. Method.
JP61046524A 1986-03-04 1986-03-04 Printed circuit board shielding method Expired - Lifetime JPH0654838B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61046524A JPH0654838B2 (en) 1986-03-04 1986-03-04 Printed circuit board shielding method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61046524A JPH0654838B2 (en) 1986-03-04 1986-03-04 Printed circuit board shielding method

Publications (2)

Publication Number Publication Date
JPS62203398A true JPS62203398A (en) 1987-09-08
JPH0654838B2 JPH0654838B2 (en) 1994-07-20

Family

ID=12749664

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61046524A Expired - Lifetime JPH0654838B2 (en) 1986-03-04 1986-03-04 Printed circuit board shielding method

Country Status (1)

Country Link
JP (1) JPH0654838B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0567894A (en) * 1991-09-10 1993-03-19 Matsushita Electric Ind Co Ltd Printed circuit board
JPH0567090U (en) * 1992-02-19 1993-09-03 松下電器産業株式会社 Printed board

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5527264U (en) * 1978-08-08 1980-02-21
JPS6020163U (en) * 1983-07-20 1985-02-12 カルソニックカンセイ株式会社 printed wiring board
JPS6127372U (en) * 1984-07-25 1986-02-18 ミツミ電機株式会社 circuit board

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1574416A (en) * 1976-07-23 1980-09-03 Shell Int Research Preparation of organic acids and/or esters
JPS6020163B2 (en) * 1980-06-28 1985-05-20 株式会社 ウロコ製作所 Veneer veneer cutting equipment

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5527264U (en) * 1978-08-08 1980-02-21
JPS6020163U (en) * 1983-07-20 1985-02-12 カルソニックカンセイ株式会社 printed wiring board
JPS6127372U (en) * 1984-07-25 1986-02-18 ミツミ電機株式会社 circuit board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0567894A (en) * 1991-09-10 1993-03-19 Matsushita Electric Ind Co Ltd Printed circuit board
JPH0567090U (en) * 1992-02-19 1993-09-03 松下電器産業株式会社 Printed board

Also Published As

Publication number Publication date
JPH0654838B2 (en) 1994-07-20

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