JPS62200738A - Circuit substrate structure - Google Patents
Circuit substrate structureInfo
- Publication number
- JPS62200738A JPS62200738A JP61043226A JP4322686A JPS62200738A JP S62200738 A JPS62200738 A JP S62200738A JP 61043226 A JP61043226 A JP 61043226A JP 4322686 A JP4322686 A JP 4322686A JP S62200738 A JPS62200738 A JP S62200738A
- Authority
- JP
- Japan
- Prior art keywords
- bump
- aluminium pad
- substrate
- junction
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 title abstract description 17
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 34
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 34
- 230000003746 surface roughness Effects 0.000 claims abstract description 19
- 229910052751 metal Inorganic materials 0.000 abstract description 4
- 239000002184 metal Substances 0.000 abstract description 4
- 239000000956 alloy Substances 0.000 abstract description 3
- 229910045601 alloy Inorganic materials 0.000 abstract description 3
- 238000000034 method Methods 0.000 abstract description 3
- 239000004411 aluminium Substances 0.000 abstract 9
- 230000035929 gnawing Effects 0.000 abstract 1
- 239000007787 solid Substances 0.000 abstract 1
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 8
- 239000000853 adhesive Substances 0.000 description 6
- 230000001070 adhesive effect Effects 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 239000012790 adhesive layer Substances 0.000 description 4
- 229910052759 nickel Inorganic materials 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 235000014676 Phragmites communis Nutrition 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000010410 layer Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000004439 roughness measurement Methods 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はバンプ付き基板によるテープキャリア方式の回
路基板構造に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a tape carrier type circuit board structure using a bumped board.
本発明はバンプ付き基板によるテープキャリア方式の回
路基板構造において、その回路基板のフィンガーリード
先端に位置し、かつ集積回路素子のアルミパッドに対向
した位置に設けられたバンプにつき、その表面の面粗度
t−5〜15μmにすることによυ、集積回路素子のア
ルミパッドとの接合性を安定化したものである。The present invention relates to a tape carrier type circuit board structure using a board with bumps, and the bumps provided at the tips of the finger leads of the circuit board and facing the aluminum pads of the integrated circuit element have surface roughness. By setting the thickness to t-5 to 15 μm, the bonding property with the aluminum pad of the integrated circuit element is stabilized.
従来のバンプ付き基板によるテープキャリア方式の回路
基板構造は、第2図にその断面を示すように、1のフィ
ンガーリードに、5で示すような凹状のネック部を設け
ることにより、乙のような突起すなわちバンプを形成し
ている。そしてバンプ6の表面8すなわち集積回路素子
と接合される面については、その面粗度が6μm以下の
平滑な状態を用いていた。The conventional tape carrier type circuit board structure using a board with bumps, as shown in the cross section of Fig. It forms a protrusion or bump. As for the surface 8 of the bump 6, that is, the surface to be bonded to the integrated circuit element, a smooth surface with a surface roughness of 6 μm or less was used.
しかし、前述の従来技術では、集積回路素子のアルミハ
ンドと接合させる際に、特にアルミパッドの表面酸化膜
が比較的厚くなっている場合には、接合が不安定で、強
度が出ない、あるいは接合しないといった状態に至る場
合があるという問題点を有する。そこで本発明はこのよ
うな問題点を解決するものであり、その目的とするとこ
ろは、集積回路素子のアルミパッドと安定して接合可能
なバンブ付き基板構造を提供するところにある。However, with the above-mentioned conventional technology, when bonding an integrated circuit element with an aluminum hand, especially when the surface oxide film of the aluminum pad is relatively thick, the bond is unstable and does not have sufficient strength, or This has a problem in that it may lead to a state where it does not bond. SUMMARY OF THE INVENTION The present invention is intended to solve these problems, and its purpose is to provide a bumped substrate structure that can be stably bonded to an aluminum pad of an integrated circuit element.
本発明の回路基板構造は、バンブ付き基板によるテープ
キャリア方式の回路基板において、そのフィンガーリー
ド先端に位置し、かつ接合される集積回路素子のアルミ
パッドに対応した位置に、アルミパッドに対向して設け
られた、突起状の接合用771表面か、面粗度5〜15
μmの凹凸を有することを特徴とする。The circuit board structure of the present invention is a tape carrier type circuit board using a bumped board, and the circuit board is located at the tip of the finger lead and at a position corresponding to the aluminum pad of the integrated circuit element to be bonded, and facing the aluminum pad. The protruding joining surface 771 provided has a surface roughness of 5 to 15.
It is characterized by having irregularities of μm.
本発明の上記の構成によれば、ICチップのアルミハン
ドとの接合の除に、基板バンプ表面の粗い凸部が、アル
ミパッド表面にくい込みつつ変形スルことによシ、アル
ミパッド表面の酸化膜を効率的に破壊し、アルミパッド
内部の清浄な金属面と基板バンプ金属とが、容易に合金
を形成し、強固な接合を得ることが可能となる。According to the above structure of the present invention, in addition to bonding the IC chip with the aluminum hand, the rough convex portions on the surface of the substrate bumps can sink into the surface of the aluminum pad and cause the oxide film on the surface of the aluminum pad to deform. The clean metal surface inside the aluminum pad and the substrate bump metal can easily form an alloy, making it possible to obtain a strong bond.
特に5μm以上の面粗度において、前記の酸化膜破壊効
果が大きく、接合強度及び接合歩留りの点で透れている
。ただし、15μmを越える面粗度とすると、バンブ6
の凹凸の谷の部分におけるフィンガーリードの厚みが、
かなり薄くなり、フィンガーリード自体の破断強度が、
接合強度に比較して極めて弱くなってしまうため問題が
ある。In particular, when the surface roughness is 5 μm or more, the above-mentioned oxide film destruction effect is large, and the bonding strength and bonding yield are improved. However, if the surface roughness exceeds 15 μm, bump 6
The thickness of the finger reed at the valley part of the unevenness is
It becomes considerably thinner, and the breaking strength of the finger reed itself decreases.
This poses a problem because it becomes extremely weak compared to the bonding strength.
したがって、総合的にみて5〜15μmの面粗度とした
場合が、最も品質的に秀れている。Therefore, overall, a surface roughness of 5 to 15 μm provides the best quality.
第1囚は本発明の実施例における主要断面図であって、
1はポリイミド等の基板ベースフィルム、2は接着層、
5は導体パターン、4はフィンガーリード、5はフィン
ガーリードの凹部であシ、6はフィンガーリードのバン
プ部、7はバンブの接合面であシ、この面は銅素材にニ
ッケルメッキ及びさらにその上に金メッキが施こされて
おり、この接合面の面粗度が約9μmであることが特徴
である。The first figure is a main sectional view in an embodiment of the present invention,
1 is a substrate base film such as polyimide, 2 is an adhesive layer,
5 is a conductor pattern, 4 is a finger lead, 5 is a concave part of the finger lead, 6 is a bump part of the finger lead, and 7 is a bonding surface of the bump. This surface is a copper material plated with nickel and further on. The bonding surface is characterized by a surface roughness of approximately 9 μm.
一方、第2図は従来の実施例における主要断面図であり
、8で示すバンプ部接合面は、面粗度が約6μm以下と
なっている。On the other hand, FIG. 2 is a main cross-sectional view of a conventional embodiment, and the bump portion bonding surface indicated by 8 has a surface roughness of about 6 μm or less.
第1図の本発明のフィンガーリード4は厚み約65μm
、幅約60μmであり、凹部5の深さは約15μmであ
シ、バンブ6は厚み約65μm1幅約60μm1長さ約
60μmである。バンプ接合面7は、銅素材上にニッケ
ルメッキ約1μm、その上に金メッキ約1μmの構成と
なっており、その面粗度は約9μmである。その面粗度
測定データを第4図に示す。この約9μmの粗さの形成
方法に関しては、第1 K第1図に示す本実施例の場合
のように、1の回路基板ベースフィルム側に向う方向に
、バンプ接合面7を設ける場合においては、導体パター
ン6の接着J@2との接着層12の粗さを、化学研磨等
を施して除去すること無く、そのまま用いて、その面の
上にニッケル及び金メッキを施して用いる。すなわち、
接着面12は、銅箔製造時において、接着層2との接着
力を増す目的で、電解鋼メッキによる析出粒子にて、粗
化しであるためである。また第2として、バンプ接合面
7を1の回路基板ベースフィルム側と反対方向に形成す
る場合においては、非接着面15は銅箔製造時には、5
μm以下であるため、化学エンチングによシ粗化してか
ら、ニッケル及び金メッキを施して用いる。The finger lead 4 of the present invention shown in FIG. 1 has a thickness of approximately 65 μm.
The recess 5 has a depth of about 15 μm, and the bump 6 has a thickness of about 65 μm, a width of about 60 μm, and a length of about 60 μm. The bump bonding surface 7 has a structure in which a copper material is plated with nickel to a thickness of about 1 .mu.m, and a layer of gold is plated thereon to a thickness of about 1 .mu.m, and the surface roughness thereof is about 9 .mu.m. Figure 4 shows the surface roughness measurement data. Regarding the method of forming the roughness of about 9 μm, when the bump bonding surface 7 is provided in the direction toward the circuit board base film 1 as in the case of this embodiment shown in FIG. The roughness of the adhesive layer 12 with the adhesive J@2 of the conductor pattern 6 is not removed by chemical polishing or the like, but is used as it is, and the surface is plated with nickel and gold. That is,
This is because the adhesive surface 12 is roughened with particles deposited by electrolytic steel plating in order to increase the adhesive force with the adhesive layer 2 during the production of the copper foil. Second, when the bump bonding surface 7 is formed in the opposite direction to the circuit board base film side of 1, the non-adhesive surface 15 is
Since it is less than μm, it is roughened by chemical etching and then plated with nickel and gold before use.
このような本発明による回路基板構造を用いれば、第5
図に示すように、ICチップのアルミパッドと、基板の
フィンガーリード上のバンブとを一括接合させる際に、
次のような作用により、互いに強固な接合状態を安定し
て得ることができる。If such a circuit board structure according to the present invention is used, the fifth
As shown in the figure, when bonding the aluminum pads of the IC chip and the bumps on the finger leads of the board at once,
Due to the following action, a mutually strong bonding state can be stably obtained.
まず、ICチップ9のアルミパッド10と、基板の対応
するフィンガーリード上のバンブ6とを位置合わせする
。次に、ヒーターンールによシ、フィンガーリードのバ
ンプ6iIC!チンプ9に押しつけ、フィンガーリード
上のバンプ接合面7をアルミパッド10に接触させて、
加圧、加熱する。First, the aluminum pads 10 of the IC chip 9 and the bumps 6 on the corresponding finger leads of the substrate are aligned. Next, heat turn, finger lead bump 6iIC! Press it against the chimp 9, bring the bump joint surface 7 on the finger lead into contact with the aluminum pad 10,
Apply pressure and heat.
加圧は1バンブあたり約10Of、加熱はヒーターンー
ル温度で約500℃、時間は1〜2秒である。この時に
おいて、初めに基板バンプ表面の粗い突起がICチップ
のアルミバッドにくさび状にくい込み、そしてヒーター
ンールの圧力により、基板バンプの粗い突起が押しつぶ
され、加圧方向と垂直方向にふくらむ状態にて変形する
ことにより、アルミパッド表面のアルミ酸化膜を非常に
効率的に破壊排除し、アルミパッド内部のアルミの清浄
な面を安定して露出させることができる。これにより、
加熱、加圧環境のもとにおいて、基板バンプの金稿とア
ルミとが容易に反応し、十分な合金を形成して、強固な
接合を得ることができる。Pressure was applied at about 10 Of per bump, and heating was carried out at a heating ring temperature of about 500° C. for 1 to 2 seconds. At this time, the rough protrusions on the surface of the substrate bumps first wedge into the aluminum pad of the IC chip, and then the rough protrusions on the substrate bumps are crushed by the pressure of the heater turn, causing them to bulge in a direction perpendicular to the direction of pressure. By deforming, the aluminum oxide film on the surface of the aluminum pad can be destroyed and removed very efficiently, and the clean aluminum surface inside the aluminum pad can be stably exposed. This results in
Under a heated and pressurized environment, the metal plate of the substrate bump and aluminum easily react, forming a sufficient alloy to obtain a strong bond.
結果として、接合強度としては、従来の場合は、平均1
4.6り、標準偏差5.4fであるのに対し、本発明の
場合には、平均22.1F、標準偏差4.12と約50
%アンプとがり、また接合歩留りとしても、従来の場合
は80%程度である−のに対し、本発明の場合は??チ
以上となる。ただし、ここでいう接合強度とは、第6図
において、ICチップを接合したフィンガーリードの凹
部5に測定器の端子を引っかけて、接合部を剥離する方
向すなわち図面上上方へ引っ張った時の破壊強度であシ
、接合部が破壊する場合とフィンガーリード自体あるい
はICチップ自体が破壊する場合とがある。As a result, in the conventional case, the average bonding strength was 1
4.6 with a standard deviation of 5.4f, whereas in the case of the present invention, the average is 22.1F and the standard deviation is 4.12, which is about 50
% amplifier sharpness and bonding yield are about 80% in the conventional case, whereas in the case of the present invention? ? It will be more than 1. However, the bonding strength here refers to the breakage when the terminal of the measuring device is hooked on the concave part 5 of the finger lead to which the IC chip is bonded and pulled in the direction of peeling the bonded part, that is, upward in the drawing in Fig. 6. Depending on the strength, there are cases where the bonded portion is destroyed, and cases where the finger lead itself or the IC chip itself is destroyed.
次に、バンプ接合面7の面粗度の変化に対する接合強度
及び接合歩留7の詳しいデータを第1表第1表よりわか
るように、面粗度5〜15μmの場合には、接合強度及
び接合歩留り共に高い水準となっている。また面粗度が
5μmすなわち5μm未満の場合には、接合時に酸化膜
を破壊するー効来が弱く、接合強度及び接合歩留り共に
低いレベルであシ実用上問題がある。また、面粗度が1
9μmすなわち15μmf越える場合には歩留り的には
良いものの、接合面8の凹凸が大きいため、その接合面
8の谷部において、フィンガーリードの厚みがかなり薄
くなり、フィンガーリードそのものの破断強度が、接合
部の剥離強度より大幅に弱くなってしまうため問題があ
る。Next, as can be seen from Table 1, detailed data on the bonding strength and bonding yield 7 with respect to changes in the surface roughness of the bump bonding surface 7 are shown in Table 1. Both bonding yields are at a high level. If the surface roughness is 5 μm, that is, less than 5 μm, the effect of destroying the oxide film during bonding is weak, and both bonding strength and bonding yield are at low levels, which is a practical problem. Also, the surface roughness is 1
If it exceeds 9 μm, that is, 15 μmf, the yield is good, but the unevenness of the bonding surface 8 is large, so the thickness of the finger lead becomes considerably thinner in the troughs of the bonding surface 8, and the breaking strength of the finger lead itself is lower than the bonding strength. This is problematic because the peel strength is significantly weaker than that of the other parts.
したがって総合的にみた強度としては本発明の面粗度が
5〜15μmの場合が良好である。Therefore, in terms of overall strength, the surface roughness of the present invention is 5 to 15 μm.
以上に述べたように本発明によれば、バンプ付き基板に
よるテープキャリア方式において、その回路基板のフィ
ンガーリード先端部に設けたバンプの、ICチップのア
ルミパッドとの接合面の面粗度を5〜15μmにするこ
とにより、接合時にICチップのアルミパッドの酸化膜
を容易に破壊することができ、基板のバンプとICチッ
プのアルミパッドとの接合の強度及び安定性を著しく高
めることができるという効果を有する。As described above, according to the present invention, in a tape carrier system using a bumped board, the surface roughness of the bonding surface of the bump provided at the tip of the finger lead of the circuit board with the aluminum pad of the IC chip is 5. By making the thickness ~15 μm, the oxide film on the aluminum pad of the IC chip can be easily destroyed during bonding, and the strength and stability of the bond between the bump on the substrate and the aluminum pad on the IC chip can be significantly increased. have an effect.
第1図は本発明の回路基板構造の一実施例を示す主要断
面図。
第2図は従来の回路基板構造を示す主要断面図。
第5図は本発明の回路基板を用いた工Cチップでの実装
構造を示す断面図。
第4図は本発明のバンブ接合面の面粗度データ図。
1・・・・・・回路基板ベースフィルム2・・・・・・
接着層
6・・・・・・導体パターン
4・・・・・・フィンガーリード
5・・・・・・フィンガーリード凹部
6・・・・・・フィンガーリードバンブ部7・・・・・
・バンブ接合面
8・・・・・・従来のバンプ接合面
9・・・・・・ICチップ
10・・・・・・ICチップのアルミパッド11・・・
・・・ICチップのパシベーション膜12・・・・・・
接着面
16・・・・・・非接着面
以 上
出願人 セイコーエプソン株式会社
手1図
千2図
100、、gty 。
ヒ一一一一FIG. 1 is a main sectional view showing an embodiment of the circuit board structure of the present invention. FIG. 2 is a main sectional view showing a conventional circuit board structure. FIG. 5 is a sectional view showing a mounting structure of an engineered C chip using the circuit board of the present invention. FIG. 4 is a surface roughness data diagram of the bump joint surface of the present invention. 1... Circuit board base film 2...
Adhesive layer 6... Conductor pattern 4... Finger lead 5... Finger lead recess 6... Finger lead bump portion 7...
・Bump bonding surface 8...Conventional bump bonding surface 9...IC chip 10...Aluminum pad 11 of the IC chip...
...IC chip passivation film 12...
Adhesive surface 16...Non-adhesive surface and above Applicant Seiko Epson Co., Ltd. 1, 1,2, 100, gty. H1111
Claims (1)
おいて、そのフィンガーリード先端部に位置し、かつ接
合される集積回路素子のアルミパッドに対応した位置に
、アルミパッドに対向して設けられた、突起状の接合用
バンプ表面が、面粗度5〜15μmの凹凸を有すること
を特徴とする回路基板構造。In a tape carrier type circuit board using a bumped board, a protrusion is provided facing the aluminum pad at the tip of the finger lead and at a position corresponding to the aluminum pad of the integrated circuit element to be bonded. A circuit board structure characterized in that a bonding bump surface has irregularities with a surface roughness of 5 to 15 μm.
Priority Applications (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61043226A JPS62200738A (en) | 1986-02-28 | 1986-02-28 | Circuit substrate structure |
US07/017,419 US4786545A (en) | 1986-02-28 | 1987-02-24 | Circuit substrate and method for forming bumps on the circuit substrate |
GB8704425A GB2187331B (en) | 1986-02-28 | 1987-02-25 | Method of forming an integrated circuit assembly or part thereof |
GB8901825A GB2211351B (en) | 1986-02-28 | 1989-01-27 | Method of forming an integrated circuit assembly or part thereof |
SG1392A SG1392G (en) | 1986-02-28 | 1992-01-08 | Method of forming an integrated circuit assembly or part thereof |
SG1492A SG1492G (en) | 1986-02-28 | 1992-01-08 | Method of forming an integrated circuit assembly or part thereof |
HK35993A HK35993A (en) | 1986-02-28 | 1993-04-15 | Method of forming an integrated circuit assembly or part thereof |
HK36093A HK36093A (en) | 1986-02-28 | 1993-04-15 | Method of forming an integrated circuit assembly or part thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61043226A JPS62200738A (en) | 1986-02-28 | 1986-02-28 | Circuit substrate structure |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS62200738A true JPS62200738A (en) | 1987-09-04 |
JPH0533533B2 JPH0533533B2 (en) | 1993-05-19 |
Family
ID=12657998
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61043226A Granted JPS62200738A (en) | 1986-02-28 | 1986-02-28 | Circuit substrate structure |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62200738A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08115945A (en) * | 1994-10-14 | 1996-05-07 | Nec Corp | Manufacture of semiconductor device |
KR19980044255A (en) * | 1996-12-06 | 1998-09-05 | 황인길 | Lead Finger Structure of Flip Chip Substrate |
JP2001210671A (en) * | 2000-01-28 | 2001-08-03 | Nec Kansai Ltd | Semiconductor device |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52124865A (en) * | 1976-04-13 | 1977-10-20 | Sharp Corp | Semiconductor device |
JPS55138864A (en) * | 1979-04-16 | 1980-10-30 | Sharp Corp | Method of fabricating semiconductor assembling substrate |
JPS55140238A (en) * | 1979-04-20 | 1980-11-01 | Hitachi Ltd | Tape carrier type semiconductor device |
-
1986
- 1986-02-28 JP JP61043226A patent/JPS62200738A/en active Granted
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52124865A (en) * | 1976-04-13 | 1977-10-20 | Sharp Corp | Semiconductor device |
JPS55138864A (en) * | 1979-04-16 | 1980-10-30 | Sharp Corp | Method of fabricating semiconductor assembling substrate |
JPS55140238A (en) * | 1979-04-20 | 1980-11-01 | Hitachi Ltd | Tape carrier type semiconductor device |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08115945A (en) * | 1994-10-14 | 1996-05-07 | Nec Corp | Manufacture of semiconductor device |
KR19980044255A (en) * | 1996-12-06 | 1998-09-05 | 황인길 | Lead Finger Structure of Flip Chip Substrate |
JP2001210671A (en) * | 2000-01-28 | 2001-08-03 | Nec Kansai Ltd | Semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JPH0533533B2 (en) | 1993-05-19 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |